add some code

managed_components/espressif__esp_io_expander/.component_hash

@@ -0,0 +1 @@
+fbc0de4082fc7c207dc98a93a0ed83d1a929a4ecee83cc567afb406f3ee6d4a6

managed_components/espressif__esp_io_expander/CHECKSUMS.json

@@ -0,0 +1 @@
+{"version": "1.0", "algorithm": "sha256", "created_at": "2025-05-21T16:34:46.921007+00:00", "files": [{"path": "CMakeLists.txt", "size": 72, "hash": "5f9c4367435d013889a4301d77184d9e482a88dfa516a3eb6a97d5de12f7f750"}, {"path": "idf_component.yml", "size": 212, "hash": "a9bd1a41536118c6fe26cfddb0444641152ca99e699879f48e7b4e25f7454485"}, {"path": "esp_io_expander.c", "size": 8411, "hash": "8e21aa87fdfa204a12449d5d3df616b7270f50d4d32d023cde61bf94b3a86537"}, {"path": "README.md", "size": 361, "hash": "ecf885bd052024df80166c2ef57bc2f5c2fd8057e62923f7fa4b54b402bc68a3"}, {"path": "license.txt", "size": 11358, "hash": "cfc7749b96f63bd31c3c42b5c471bf756814053e847c10f3eb003417bc523d30"}, {"path": "include/esp_io_expander.h", "size": 8909, "hash": "492ae7a689d9e50c7ce9e9eda9ea8fea0d07e32d82cafbbdc5871177dfe1caf8"}]}

managed_components/espressif__esp_io_expander/CMakeLists.txt

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+idf_component_register(SRCS "esp_io_expander.c" INCLUDE_DIRS "include")

managed_components/espressif__esp_io_expander/README.md

@@ -0,0 +1,13 @@
+# ESP IO Expander Component
+
+This componnent is main esp_io_expander component which defines main functions and types for easy adding specific io expander chip component.
+
+## Supported features
+
+- [x] Set an IO's direction
+- [x] Get an IO's direction
+- [x] Set an IO's output level
+- [x] Get an IO's input level
+- [x] Show all IOs' status
+- [ ] Interrupt mode
+

managed_components/espressif__esp_io_expander/esp_io_expander.c

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+/*
+ * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <inttypes.h>
+#include <stdlib.h>
+
+#include "esp_bit_defs.h"
+#include "esp_check.h"
+#include "esp_log.h"
+
+#include "esp_io_expander.h"
+
+#define VALID_IO_COUNT(handle)      ((handle)->config.io_count <= IO_COUNT_MAX ? (handle)->config.io_count : IO_COUNT_MAX)
+
+/**
+ * @brief Register type
+ *
+ */
+typedef enum {
+    REG_INPUT = 0,
+    REG_OUTPUT,
+    REG_DIRECTION,
+} reg_type_t;
+
+static char *TAG = "io_expander";
+
+static esp_err_t write_reg(esp_io_expander_handle_t handle, reg_type_t reg, uint32_t value);
+static esp_err_t read_reg(esp_io_expander_handle_t handle, reg_type_t reg, uint32_t *value);
+
+esp_err_t esp_io_expander_set_dir(esp_io_expander_handle_t handle, uint32_t pin_num_mask, esp_io_expander_dir_t direction)
+{
+    ESP_RETURN_ON_FALSE(handle, ESP_ERR_INVALID_ARG, TAG, "Invalid handle");
+    if (pin_num_mask >= BIT64(VALID_IO_COUNT(handle))) {
+        ESP_LOGW(TAG, "Pin num mask out of range, bit higher than %d won't work", VALID_IO_COUNT(handle) - 1);
+    }
+
+    bool is_output = (direction == IO_EXPANDER_OUTPUT) ? true : false;
+    uint32_t dir_reg, temp;
+    ESP_RETURN_ON_ERROR(read_reg(handle, REG_DIRECTION, &dir_reg), TAG, "Read direction reg failed");
+    temp = dir_reg;
+    if ((is_output && !handle->config.flags.dir_out_bit_zero) || (!is_output && handle->config.flags.dir_out_bit_zero)) {
+        /* 1. Output && Set 1 to output */
+        /* 2. Input && Set 1 to input */
+        dir_reg |= pin_num_mask;
+    } else {
+        /* 3. Output && Set 0 to output */
+        /* 4. Input && Set 0 to input */
+        dir_reg &= ~pin_num_mask;
+    }
+    /* Write to reg only when different */
+    if (dir_reg != temp) {
+        ESP_RETURN_ON_ERROR(write_reg(handle, REG_DIRECTION, dir_reg), TAG, "Write direction reg failed");
+    }
+
+    return ESP_OK;
+}
+
+esp_err_t esp_io_expander_set_level(esp_io_expander_handle_t handle, uint32_t pin_num_mask, uint8_t level)
+{
+    ESP_RETURN_ON_FALSE(handle, ESP_ERR_INVALID_ARG, TAG, "Invalid handle");
+    if (pin_num_mask >= BIT64(VALID_IO_COUNT(handle))) {
+        ESP_LOGW(TAG, "Pin num mask out of range, bit higher than %d won't work", VALID_IO_COUNT(handle) - 1);
+    }
+
+    uint32_t dir_reg, dir_bit;
+    ESP_RETURN_ON_ERROR(read_reg(handle, REG_DIRECTION, &dir_reg), TAG, "Read direction reg failed");
+
+    uint8_t io_count = VALID_IO_COUNT(handle);
+    /* Check every target pin's direction, must be in output mode */
+    for (int i = 0; i < io_count; i++) {
+        if (pin_num_mask & BIT(i)) {
+            dir_bit = dir_reg & BIT(i);
+            /* Check whether it is in input mode */
+            if ((dir_bit && handle->config.flags.dir_out_bit_zero) || (!dir_bit && !handle->config.flags.dir_out_bit_zero)) {
+                /* 1. 1 && Set 1 to input */
+                /* 2. 0 && Set 0 to input */
+                ESP_LOGE(TAG, "Pin[%d] can't set level in input mode", i);
+                return ESP_ERR_INVALID_STATE;
+            }
+        }
+    }
+
+    uint32_t output_reg, temp;
+    /* Read the current output level */
+    ESP_RETURN_ON_ERROR(read_reg(handle, REG_OUTPUT, &output_reg), TAG, "Read Output reg failed");
+    temp = output_reg;
+    /* Set expected output level */
+    if ((level && !handle->config.flags.output_high_bit_zero) || (!level && handle->config.flags.output_high_bit_zero)) {
+        /* 1. High level && Set 1 to output high */
+        /* 2. Low level && Set 1 to output low */
+        output_reg |= pin_num_mask;
+    } else {
+        /* 3. High level && Set 0 to output high */
+        /* 4. Low level && Set 0 to output low */
+        output_reg &= ~pin_num_mask;
+    }
+    /* Write to reg only when different */
+    if (output_reg != temp) {
+        ESP_RETURN_ON_ERROR(write_reg(handle, REG_OUTPUT, output_reg), TAG, "Write Output reg failed");
+    }
+
+    return ESP_OK;
+}
+
+esp_err_t esp_io_expander_get_level(esp_io_expander_handle_t handle, uint32_t pin_num_mask, uint32_t *level_mask)
+{
+    ESP_RETURN_ON_FALSE(handle, ESP_ERR_INVALID_ARG, TAG, "Invalid handle");
+    ESP_RETURN_ON_FALSE(level_mask, ESP_ERR_INVALID_ARG, TAG, "Invalid level");
+    if (pin_num_mask >= BIT64(VALID_IO_COUNT(handle))) {
+        ESP_LOGW(TAG, "Pin num mask out of range, bit higher than %d won't work", VALID_IO_COUNT(handle) - 1);
+    }
+
+    uint32_t input_reg;
+    ESP_RETURN_ON_ERROR(read_reg(handle, REG_INPUT, &input_reg), TAG, "Read input reg failed");
+    if (!handle->config.flags.input_high_bit_zero) {
+        /* Get 1 when input high level */
+        *level_mask = input_reg & pin_num_mask;
+    } else {
+        /* Get 0 when input high level */
+        *level_mask = ~input_reg & pin_num_mask;
+    }
+
+    return ESP_OK;
+}
+
+esp_err_t esp_io_expander_print_state(esp_io_expander_handle_t handle)
+{
+    ESP_RETURN_ON_FALSE(handle, ESP_ERR_INVALID_ARG, TAG, "Invalid handle");
+
+    uint8_t io_count = VALID_IO_COUNT(handle);
+    uint32_t input_reg, output_reg, dir_reg;
+    ESP_RETURN_ON_ERROR(read_reg(handle, REG_INPUT, &input_reg), TAG, "Read input reg failed");
+    ESP_RETURN_ON_ERROR(read_reg(handle, REG_OUTPUT, &output_reg), TAG, "Read output reg failed");
+    ESP_RETURN_ON_ERROR(read_reg(handle, REG_DIRECTION, &dir_reg), TAG, "Read direction reg failed");
+    /* Get 1 if high level */
+    if (handle->config.flags.input_high_bit_zero) {
+        input_reg ^= 0xffffffff;
+    }
+    /* Get 1 if high level */
+    if (handle->config.flags.output_high_bit_zero) {
+        output_reg ^= 0xffffffff;
+    }
+    /* Get 1 if output */
+    if (handle->config.flags.dir_out_bit_zero) {
+        dir_reg ^= 0xffffffff;
+    }
+
+    for (int i = 0; i < io_count; i++) {
+        ESP_LOGI(TAG, "Index[%d] | Dir[%s] | In[%d] | Out[%d]", i, (dir_reg & BIT(i)) ? "Out" : "In",
+                 (input_reg & BIT(i)) ? 1 : 0, (output_reg & BIT(i)) ? 1 : 0);
+    }
+
+    return ESP_OK;
+}
+
+esp_err_t esp_io_expander_reset(esp_io_expander_handle_t handle)
+{
+    ESP_RETURN_ON_FALSE(handle, ESP_ERR_INVALID_ARG, TAG, "Invalid handle");
+    ESP_RETURN_ON_FALSE(handle->reset, ESP_ERR_NOT_SUPPORTED, TAG, "reset isn't implemented");
+
+    return handle->reset(handle);
+}
+
+esp_err_t esp_io_expander_del(esp_io_expander_handle_t handle)
+{
+    ESP_RETURN_ON_FALSE(handle, ESP_ERR_INVALID_ARG, TAG, "Invalid handle");
+    ESP_RETURN_ON_FALSE(handle->del, ESP_ERR_NOT_SUPPORTED, TAG, "del isn't implemented");
+
+    return handle->del(handle);
+}
+
+/**
+ * @brief Write the value to a specific register
+ *
+ * @param handle: IO Expander handle
+ * @param reg: Specific type of register
+ * @param value: Expected register's value
+ * @return
+ *      - ESP_OK: Success, otherwise returns ESP_ERR_xxx
+ */
+static esp_err_t write_reg(esp_io_expander_handle_t handle, reg_type_t reg, uint32_t value)
+{
+    switch (reg) {
+    case REG_OUTPUT:
+        ESP_RETURN_ON_FALSE(handle->write_output_reg, ESP_ERR_NOT_SUPPORTED, TAG, "write_output_reg isn't implemented");
+        return handle->write_output_reg(handle, value);
+    case REG_DIRECTION:
+        ESP_RETURN_ON_FALSE(handle->write_direction_reg, ESP_ERR_NOT_SUPPORTED, TAG, "write_direction_reg isn't implemented");
+        return handle->write_direction_reg(handle, value);
+    default:
+        return ESP_ERR_NOT_SUPPORTED;
+    }
+
+    return ESP_OK;
+}
+
+/**
+ * @brief Read the value from a specific register
+ *
+ * @param handle: IO Expander handle
+ * @param reg: Specific type of register
+ * @param value: Actual register's value
+ * @return
+ *      - ESP_OK: Success, otherwise returns ESP_ERR_xxx
+ */
+static esp_err_t read_reg(esp_io_expander_handle_t handle, reg_type_t reg, uint32_t *value)
+{
+    ESP_RETURN_ON_FALSE(value, ESP_ERR_INVALID_ARG, TAG, "Invalid value");
+
+    switch (reg) {
+    case REG_INPUT:
+        ESP_RETURN_ON_FALSE(handle->read_input_reg, ESP_ERR_NOT_SUPPORTED, TAG, "read_input_reg isn't implemented");
+        return handle->read_input_reg(handle, value);
+    case REG_OUTPUT:
+        ESP_RETURN_ON_FALSE(handle->read_output_reg, ESP_ERR_NOT_SUPPORTED, TAG, "read_output_reg isn't implemented");
+        return handle->read_output_reg(handle, value);
+    case REG_DIRECTION:
+        ESP_RETURN_ON_FALSE(handle->read_direction_reg, ESP_ERR_NOT_SUPPORTED, TAG, "read_direction_reg isn't implemented");
+        return handle->read_direction_reg(handle, value);
+    default:
+        return ESP_ERR_NOT_SUPPORTED;
+    }
+
+    return ESP_OK;
+}

managed_components/espressif__esp_io_expander/idf_component.yml

@@ -0,0 +1,5 @@
+dependencies:
+  idf: '>=4.4.2'
+description: ESP IO Expander - main component for using io expander chip
+url: https://github.com/espressif/esp-bsp/tree/master/components/io_expander/esp_io_expander
+version: 1.0.1

managed_components/espressif__esp_io_expander/include/esp_io_expander.h

@@ -0,0 +1,265 @@
+/*
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define IO_COUNT_MAX        (sizeof(uint32_t) * 8)
+
+/**
+ * @brief IO Expander Device Type
+ *
+ */
+typedef struct esp_io_expander_s esp_io_expander_t;
+typedef esp_io_expander_t *esp_io_expander_handle_t;
+
+/**
+ * @brief IO Expander Pin Num
+ *
+ */
+typedef enum {
+    IO_EXPANDER_PIN_NUM_0  = (1ULL << 0),
+    IO_EXPANDER_PIN_NUM_1  = (1ULL << 1),
+    IO_EXPANDER_PIN_NUM_2  = (1ULL << 2),
+    IO_EXPANDER_PIN_NUM_3  = (1ULL << 3),
+    IO_EXPANDER_PIN_NUM_4  = (1ULL << 4),
+    IO_EXPANDER_PIN_NUM_5  = (1ULL << 5),
+    IO_EXPANDER_PIN_NUM_6  = (1ULL << 6),
+    IO_EXPANDER_PIN_NUM_7  = (1ULL << 7),
+    IO_EXPANDER_PIN_NUM_8  = (1ULL << 8),
+    IO_EXPANDER_PIN_NUM_9  = (1ULL << 9),
+    IO_EXPANDER_PIN_NUM_10 = (1ULL << 10),
+    IO_EXPANDER_PIN_NUM_11 = (1ULL << 11),
+    IO_EXPANDER_PIN_NUM_12 = (1ULL << 12),
+    IO_EXPANDER_PIN_NUM_13 = (1ULL << 13),
+    IO_EXPANDER_PIN_NUM_14 = (1ULL << 14),
+    IO_EXPANDER_PIN_NUM_15 = (1ULL << 15),
+    IO_EXPANDER_PIN_NUM_16 = (1ULL << 16),
+    IO_EXPANDER_PIN_NUM_17 = (1ULL << 17),
+    IO_EXPANDER_PIN_NUM_18 = (1ULL << 18),
+    IO_EXPANDER_PIN_NUM_19 = (1ULL << 19),
+    IO_EXPANDER_PIN_NUM_20 = (1ULL << 20),
+    IO_EXPANDER_PIN_NUM_21 = (1ULL << 21),
+    IO_EXPANDER_PIN_NUM_22 = (1ULL << 22),
+    IO_EXPANDER_PIN_NUM_23 = (1ULL << 23),
+    IO_EXPANDER_PIN_NUM_24 = (1ULL << 24),
+    IO_EXPANDER_PIN_NUM_25 = (1ULL << 25),
+    IO_EXPANDER_PIN_NUM_26 = (1ULL << 26),
+    IO_EXPANDER_PIN_NUM_27 = (1ULL << 27),
+    IO_EXPANDER_PIN_NUM_28 = (1ULL << 28),
+    IO_EXPANDER_PIN_NUM_29 = (1ULL << 29),
+    IO_EXPANDER_PIN_NUM_30 = (1ULL << 30),
+    IO_EXPANDER_PIN_NUM_31 = (1ULL << 31),
+} esp_io_expander_pin_num_t;
+
+/**
+ * @brief IO Expander Pin direction
+ *
+ */
+typedef enum {
+    IO_EXPANDER_INPUT,          /*!< Input direction */
+    IO_EXPANDER_OUTPUT,         /*!< Output dircetion */
+} esp_io_expander_dir_t;
+
+/**
+ * @brief IO Expander Configuration Type
+ *
+ */
+typedef struct {
+    uint8_t io_count;                       /*!< Count of device's IO, must be less or equal than `IO_COUNT_MAX` */
+    struct {
+        uint8_t dir_out_bit_zero : 1;       /*!< If the direction of IO is output, the corresponding bit of the direction register is 0 */
+        uint8_t input_high_bit_zero : 1;    /*!< If the input level of IO is high, the corresponding bit of the input register is 0 */
+        uint8_t output_high_bit_zero : 1;   /*!< If the output level of IO is high, the corresponding bit of the output register is 0 */
+    } flags;
+    /* Don't support with interrupt mode yet, will be added soon */
+} esp_io_expander_config_t;
+
+struct esp_io_expander_s {
+
+    /**
+     * @brief Read value from input register (mandatory)
+     *
+     * @note The value represents the input level from IO
+     * @note If there are multiple input registers in the device, their values should be spliced together in order to form the `value`.
+     *
+     * @param handle: IO Expander handle
+     * @param value: Register's value
+     *
+     * @return
+     *      - ESP_OK: Success, otherwise returns ESP_ERR_xxx
+     */
+    esp_err_t (*read_input_reg)(esp_io_expander_handle_t handle, uint32_t *value);
+
+    /**
+     * @brief Write value to output register (mandatory)
+     *
+     * @note The value represents the output level to IO
+     * @note If there are multiple input registers in the device, their values should be spliced together in order to form the `value`.
+     *
+     * @param handle: IO Expander handle
+     * @param value: Register's value
+     *
+     * @return
+     *      - ESP_OK: Success, otherwise returns ESP_ERR_xxx
+     */
+    esp_err_t (*write_output_reg)(esp_io_expander_handle_t handle, uint32_t value);
+
+    /**
+     * @brief Read value from output register (mandatory)
+     *
+     * @note The value represents the expected output level to IO
+     * @note This function can be implemented by reading the physical output register, or simply by reading a variable that record the output value (more faster)
+     * @note If there are multiple input registers in the device, their values should be spliced together in order to form the `value`.
+     *
+     * @param handle: IO Expander handle
+     * @param value: Register's value
+     *
+     * @return
+     *      - ESP_OK: Success, otherwise returns ESP_ERR_xxx
+     */
+    esp_err_t (*read_output_reg)(esp_io_expander_handle_t handle, uint32_t *value);
+
+    /**
+     * @brief Write value to direction register (mandatory)
+     *
+     * @note The value represents the diection of IO
+     * @note If there are multiple input registers in the device, their values should be spliced together in order to form the `value`.
+     *
+     * @param handle: IO Expander handle
+     * @param value: Register's value
+     *
+     * @return
+     *      - ESP_OK: Success, otherwise returns ESP_ERR_xxx
+     */
+    esp_err_t (*write_direction_reg)(esp_io_expander_handle_t handle, uint32_t value);
+
+    /**
+     * @brief Read value from directioin register (mandatory)
+     *
+     * @note The value represents the expected direction of IO
+     * @note This function can be implemented by reading the physical direction register, or simply by reading a variable that record the direction value (more faster)
+     * @note If there are multiple input registers in the device, their values should be spliced together in order to form the `value`.
+     *
+     * @param handle: IO Expander handle
+     * @param value: Register's value
+     *
+     * @return
+     *      - ESP_OK: Success, otherwise returns ESP_ERR_xxx
+     */
+    esp_err_t (*read_direction_reg)(esp_io_expander_handle_t handle, uint32_t *value);
+
+    /**
+     * @brief Reset the device to its initial state (mandatory)
+     *
+     * @note This function will reset all device's registers
+     *
+     * @param handle: IO Expander handle
+     *
+     * @return
+     *      - ESP_OK: Success, otherwise returns ESP_ERR_xxx
+     */
+    esp_err_t (*reset)(esp_io_expander_handle_t handle);
+
+    /**
+     * @brief Delete device (mandatory)
+     *
+     * @param handle: IO Expander handle
+     *
+     * @return
+     *      - ESP_OK: Success, otherwise returns ESP_ERR_xxx
+     */
+    esp_err_t (*del)(esp_io_expander_handle_t handle);
+
+    /**
+     * @brief Configuration structure
+     */
+    esp_io_expander_config_t config;
+};
+
+/**
+ * @brief Set the direction of a set of target IOs
+ *
+ * @param handle: IO Exapnder handle
+ * @param pin_num_mask: Bitwise OR of allowed pin num with type of `esp_io_expander_pin_num_t`
+ * @param direction: IO direction (only support input or output now)
+ *
+ * @return
+ *      - ESP_OK: Success, otherwise returns ESP_ERR_xxx
+ */
+esp_err_t esp_io_expander_set_dir(esp_io_expander_handle_t handle, uint32_t pin_num_mask, esp_io_expander_dir_t direction);
+
+/**
+ * @brief Set the output level of a set of target IOs
+ *
+ * @note All target IOs must be in output mode first, otherwise this function will return the error `ESP_ERR_INVALID_STATE`
+ *
+ * @param handle: IO Exapnder handle
+ * @param pin_num_mask: Bitwise OR of allowed pin num with type of `esp_io_expander_pin_num_t`
+ * @param level: 0 - Low level, 1 - High level
+ *
+ * @return
+ *      - ESP_OK: Success, otherwise returns ESP_ERR_xxx
+ */
+esp_err_t esp_io_expander_set_level(esp_io_expander_handle_t handle, uint32_t pin_num_mask, uint8_t level);
+
+/**
+ * @brief Get the intput level of a set of target IOs
+ *
+ * @note This function can be called whenever target IOs are in input mode or output mode
+ *
+ * @param handle: IO Exapnder handle
+ * @param pin_num_mask: Bitwise OR of allowed pin num with type of `esp_io_expander_pin_num_t`
+ * @param level: Bitwise OR of levels. For each bit, 0 - Low level, 1 - High level
+ *
+ * @return
+ *      - ESP_OK: Success, otherwise returns ESP_ERR_xxx
+ */
+esp_err_t esp_io_expander_get_level(esp_io_expander_handle_t handle, uint32_t pin_num_mask, uint32_t *level_mask);
+
+/**
+ * @brief Print the current status of each IO of the device, including direction, input level and output level
+ *
+ * @param handle: IO Exapnder handle
+ *
+ * @return
+ *      - ESP_OK: Success, otherwise returns ESP_ERR_xxx
+ */
+esp_err_t esp_io_expander_print_state(esp_io_expander_handle_t handle);
+
+/**
+ * @brief Reset the device to its initial status
+ *
+ * @note This function will reset all device's registers
+ *
+ * @param handle: IO Expander handle
+ *
+ * @return
+ *      - ESP_OK: Success, otherwise returns ESP_ERR_xxx
+ */
+esp_err_t esp_io_expander_reset(esp_io_expander_handle_t handle);
+
+/**
+ * @brief Delete device
+ *
+ * @param handle: IO Expander handle
+ *
+ * @return
+ *      - ESP_OK: Success, otherwise returns ESP_ERR_xxx
+ */
+esp_err_t esp_io_expander_del(esp_io_expander_handle_t handle);
+
+#ifdef __cplusplus
+}
+#endif

managed_components/espressif__esp_io_expander/license.txt

@@ -0,0 +1,202 @@
+
+                                 Apache License
+                           Version 2.0, January 2004
+                        http://www.apache.org/licenses/
+
+   TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
+
+   1. Definitions.
+
+      "License" shall mean the terms and conditions for use, reproduction,
+      and distribution as defined by Sections 1 through 9 of this document.
+
+      "Licensor" shall mean the copyright owner or entity authorized by
+      the copyright owner that is granting the License.
+
+      "Legal Entity" shall mean the union of the acting entity and all
+      other entities that control, are controlled by, or are under common
+      control with that entity. For the purposes of this definition,
+      "control" means (i) the power, direct or indirect, to cause the
+      direction or management of such entity, whether by contract or
+      otherwise, or (ii) ownership of fifty percent (50%) or more of the
+      outstanding shares, or (iii) beneficial ownership of such entity.
+
+      "You" (or "Your") shall mean an individual or Legal Entity
+      exercising permissions granted by this License.
+
+      "Source" form shall mean the preferred form for making modifications,
+      including but not limited to software source code, documentation
+      source, and configuration files.
+
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