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add some code

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苏雨洛
2025-09-05 13:25:11 +08:00
parent 9ff0a99e7a
commit 3cf1229a85
8911 changed files with 2535396 additions and 0 deletions
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managed_components/espressif__esp32-camera/target/esp32/ll_cam.c Normal file
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// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include <stdio.h>
#include <string.h>
#include "soc/i2s_struct.h"
#include "esp_idf_version.h"
#if (ESP_IDF_VERSION_MAJOR >= 4) && (ESP_IDF_VERSION_MINOR > 1)
#include "hal/gpio_ll.h"
#else
#include "soc/gpio_periph.h"
#define esp_rom_delay_us ets_delay_us
static inline int gpio_ll_get_level(gpio_dev_t *hw, int gpio_num)
{
if (gpio_num < 32) {
return (hw->in >> gpio_num) & 0x1;
} else {
return (hw->in1.data >> (gpio_num - 32)) & 0x1;
}
}
#endif
#include "ll_cam.h"
#include "xclk.h"
#include "cam_hal.h"
#if (ESP_IDF_VERSION_MAJOR >= 4) && (ESP_IDF_VERSION_MINOR >= 3)
#include "esp_rom_gpio.h"
#endif
#if (ESP_IDF_VERSION_MAJOR >= 5)
#include "driver/gpio.h"
#define GPIO_PIN_INTR_POSEDGE GPIO_INTR_POSEDGE
#define GPIO_PIN_INTR_NEGEDGE GPIO_INTR_NEGEDGE
#define gpio_matrix_in(a,b,c) esp_rom_gpio_connect_in_signal(a,b,c)
#endif
#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 0, 2)
#define ets_delay_us esp_rom_delay_us
#endif
static const char *TAG = "esp32 ll_cam";
#define I2S_ISR_ENABLE(i) {I2S0.int_clr.i = 1;I2S0.int_ena.i = 1;}
#define I2S_ISR_DISABLE(i) {I2S0.int_ena.i = 0;I2S0.int_clr.i = 1;}
typedef union {
struct {
uint32_t sample2:8;
uint32_t unused2:8;
uint32_t sample1:8;
uint32_t unused1:8;
};
uint32_t val;
} dma_elem_t;
typedef enum {
/* camera sends byte sequence: s1, s2, s3, s4, ...
* fifo receives: 00 s1 00 s2, 00 s2 00 s3, 00 s3 00 s4, ...
*/
SM_0A0B_0B0C = 0,
/* camera sends byte sequence: s1, s2, s3, s4, ...
* fifo receives: 00 s1 00 s2, 00 s3 00 s4, ...
*/
SM_0A0B_0C0D = 1,
/* camera sends byte sequence: s1, s2, s3, s4, ...
* fifo receives: 00 s1 00 00, 00 s2 00 00, 00 s3 00 00, ...
*/
SM_0A00_0B00 = 3,
} i2s_sampling_mode_t;
typedef size_t (*dma_filter_t)(uint8_t* dst, const uint8_t* src, size_t len);
static i2s_sampling_mode_t sampling_mode = SM_0A00_0B00;
static size_t ll_cam_bytes_per_sample(i2s_sampling_mode_t mode)
{
switch(mode) {
case SM_0A00_0B00:
return 4;
case SM_0A0B_0B0C:
return 4;
case SM_0A0B_0C0D:
return 2;
default:
assert(0 && "invalid sampling mode");
return 0;
}
}
static size_t IRAM_ATTR ll_cam_dma_filter_jpeg(uint8_t* dst, const uint8_t* src, size_t len)
{
const dma_elem_t* dma_el = (const dma_elem_t*)src;
size_t elements = len / sizeof(dma_elem_t);
size_t end = elements / 4;
// manually unrolling 4 iterations of the loop here
for (size_t i = 0; i < end; ++i) {
dst[0] = dma_el[0].sample1;
dst[1] = dma_el[1].sample1;
dst[2] = dma_el[2].sample1;
dst[3] = dma_el[3].sample1;
dma_el += 4;
dst += 4;
}
return elements;
}
static size_t IRAM_ATTR ll_cam_dma_filter_grayscale(uint8_t* dst, const uint8_t* src, size_t len)
{
const dma_elem_t* dma_el = (const dma_elem_t*)src;
size_t elements = len / sizeof(dma_elem_t);
size_t end = elements / 4;
for (size_t i = 0; i < end; ++i) {
// manually unrolling 4 iterations of the loop here
dst[0] = dma_el[0].sample1;
dst[1] = dma_el[1].sample1;
dst[2] = dma_el[2].sample1;
dst[3] = dma_el[3].sample1;
dma_el += 4;
dst += 4;
}
return elements;
}
static size_t IRAM_ATTR ll_cam_dma_filter_grayscale_highspeed(uint8_t* dst, const uint8_t* src, size_t len)
{
const dma_elem_t* dma_el = (const dma_elem_t*)src;
size_t elements = len / sizeof(dma_elem_t);
size_t end = elements / 8;
for (size_t i = 0; i < end; ++i) {
// manually unrolling 4 iterations of the loop here
dst[0] = dma_el[0].sample1;
dst[1] = dma_el[2].sample1;
dst[2] = dma_el[4].sample1;
dst[3] = dma_el[6].sample1;
dma_el += 8;
dst += 4;
}
// the final sample of a line in SM_0A0B_0B0C sampling mode needs special handling
if ((elements & 0x7) != 0) {
dst[0] = dma_el[0].sample1;
dst[1] = dma_el[2].sample1;
elements += 1;
}
return elements / 2;
}
static size_t IRAM_ATTR ll_cam_dma_filter_yuyv(uint8_t* dst, const uint8_t* src, size_t len)
{
const dma_elem_t* dma_el = (const dma_elem_t*)src;
size_t elements = len / sizeof(dma_elem_t);
size_t end = elements / 4;
for (size_t i = 0; i < end; ++i) {
dst[0] = dma_el[0].sample1;//y0
dst[1] = dma_el[0].sample2;//u
dst[2] = dma_el[1].sample1;//y1
dst[3] = dma_el[1].sample2;//v
dst[4] = dma_el[2].sample1;//y0
dst[5] = dma_el[2].sample2;//u
dst[6] = dma_el[3].sample1;//y1
dst[7] = dma_el[3].sample2;//v
dma_el += 4;
dst += 8;
}
return elements * 2;
}
static size_t IRAM_ATTR ll_cam_dma_filter_yuyv_highspeed(uint8_t* dst, const uint8_t* src, size_t len)
{
const dma_elem_t* dma_el = (const dma_elem_t*)src;
size_t elements = len / sizeof(dma_elem_t);
size_t end = elements / 8;
for (size_t i = 0; i < end; ++i) {
dst[0] = dma_el[0].sample1;//y0
dst[1] = dma_el[1].sample1;//u
dst[2] = dma_el[2].sample1;//y1
dst[3] = dma_el[3].sample1;//v
dst[4] = dma_el[4].sample1;//y0
dst[5] = dma_el[5].sample1;//u
dst[6] = dma_el[6].sample1;//y1
dst[7] = dma_el[7].sample1;//v
dma_el += 8;
dst += 8;
}
if ((elements & 0x7) != 0) {
dst[0] = dma_el[0].sample1;//y0
dst[1] = dma_el[1].sample1;//u
dst[2] = dma_el[2].sample1;//y1
dst[3] = dma_el[2].sample2;//v
elements += 4;
}
return elements;
}
static void IRAM_ATTR ll_cam_vsync_isr(void *arg)
{
//DBG_PIN_SET(1);
cam_obj_t *cam = (cam_obj_t *)arg;
BaseType_t HPTaskAwoken = pdFALSE;
// filter
ets_delay_us(1);
if (gpio_ll_get_level(&GPIO, cam->vsync_pin) == !cam->vsync_invert) {
ll_cam_send_event(cam, CAM_VSYNC_EVENT, &HPTaskAwoken);
if (HPTaskAwoken == pdTRUE) {
portYIELD_FROM_ISR();
}
}
//DBG_PIN_SET(0);
}
static void IRAM_ATTR ll_cam_dma_isr(void *arg)
{
//DBG_PIN_SET(1);
cam_obj_t *cam = (cam_obj_t *)arg;
BaseType_t HPTaskAwoken = pdFALSE;
typeof(I2S0.int_st) status = I2S0.int_st;
if (status.val == 0) {
return;
}
I2S0.int_clr.val = status.val;
if (status.in_suc_eof) {
ll_cam_send_event(cam, CAM_IN_SUC_EOF_EVENT, &HPTaskAwoken);
}
if (HPTaskAwoken == pdTRUE) {
portYIELD_FROM_ISR();
}
//DBG_PIN_SET(0);
}
bool IRAM_ATTR ll_cam_stop(cam_obj_t *cam)
{
I2S0.conf.rx_start = 0;
I2S_ISR_DISABLE(in_suc_eof);
I2S0.in_link.stop = 1;
return true;
}
esp_err_t ll_cam_deinit(cam_obj_t *cam)
{
gpio_isr_handler_remove(cam->vsync_pin);
if (cam->cam_intr_handle) {
esp_intr_free(cam->cam_intr_handle);
cam->cam_intr_handle = NULL;
}
return ESP_OK;
}
bool ll_cam_start(cam_obj_t *cam, int frame_pos)
{
I2S0.conf.rx_start = 0;
I2S_ISR_ENABLE(in_suc_eof);
I2S0.conf.rx_reset = 1;
I2S0.conf.rx_reset = 0;
I2S0.conf.rx_fifo_reset = 1;
I2S0.conf.rx_fifo_reset = 0;
I2S0.lc_conf.in_rst = 1;
I2S0.lc_conf.in_rst = 0;
I2S0.lc_conf.ahbm_fifo_rst = 1;
I2S0.lc_conf.ahbm_fifo_rst = 0;
I2S0.lc_conf.ahbm_rst = 1;
I2S0.lc_conf.ahbm_rst = 0;
I2S0.rx_eof_num = cam->dma_half_buffer_size / sizeof(dma_elem_t);
I2S0.in_link.addr = ((uint32_t)&cam->dma[0]) & 0xfffff;
I2S0.in_link.start = 1;
I2S0.conf.rx_start = 1;
return true;
}
esp_err_t ll_cam_config(cam_obj_t *cam, const camera_config_t *config)
{
// Enable and configure I2S peripheral
periph_module_enable(PERIPH_I2S0_MODULE);
I2S0.conf.rx_reset = 1;
I2S0.conf.rx_reset = 0;
I2S0.conf.rx_fifo_reset = 1;
I2S0.conf.rx_fifo_reset = 0;
I2S0.lc_conf.in_rst = 1;
I2S0.lc_conf.in_rst = 0;
I2S0.lc_conf.ahbm_fifo_rst = 1;
I2S0.lc_conf.ahbm_fifo_rst = 0;
I2S0.lc_conf.ahbm_rst = 1;
I2S0.lc_conf.ahbm_rst = 0;
I2S0.conf.rx_slave_mod = 1;
I2S0.conf.rx_right_first = 0;
I2S0.conf.rx_msb_right = 0;
I2S0.conf.rx_msb_shift = 0;
I2S0.conf.rx_mono = 0;
I2S0.conf.rx_short_sync = 0;
I2S0.conf2.lcd_en = 1;
I2S0.conf2.camera_en = 1;
// Configure clock divider
I2S0.clkm_conf.clkm_div_a = 0;
I2S0.clkm_conf.clkm_div_b = 0;
I2S0.clkm_conf.clkm_div_num = 2;
I2S0.fifo_conf.dscr_en = 1;
I2S0.fifo_conf.rx_fifo_mod = sampling_mode;
I2S0.fifo_conf.rx_fifo_mod_force_en = 1;
I2S0.conf_chan.rx_chan_mod = 1;
I2S0.sample_rate_conf.rx_bits_mod = 0;
I2S0.timing.val = 0;
I2S0.timing.rx_dsync_sw = 1;
return ESP_OK;
}
void ll_cam_vsync_intr_enable(cam_obj_t *cam, bool en)
{
if (en) {
gpio_intr_enable(cam->vsync_pin);
} else {
gpio_intr_disable(cam->vsync_pin);
}
}
esp_err_t ll_cam_set_pin(cam_obj_t *cam, const camera_config_t *config)
{
gpio_config_t io_conf = {0};
io_conf.intr_type = cam->vsync_invert ? GPIO_PIN_INTR_NEGEDGE : GPIO_PIN_INTR_POSEDGE;
io_conf.pin_bit_mask = 1ULL << config->pin_vsync;
io_conf.mode = GPIO_MODE_INPUT;
io_conf.pull_up_en = 1;
io_conf.pull_down_en = 0;
gpio_config(&io_conf);
gpio_install_isr_service(ESP_INTR_FLAG_LOWMED | ESP_INTR_FLAG_IRAM);
gpio_isr_handler_add(config->pin_vsync, ll_cam_vsync_isr, cam);
gpio_intr_disable(config->pin_vsync);
PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[config->pin_pclk], PIN_FUNC_GPIO);
gpio_set_direction(config->pin_pclk, GPIO_MODE_INPUT);
gpio_set_pull_mode(config->pin_pclk, GPIO_FLOATING);
gpio_matrix_in(config->pin_pclk, I2S0I_WS_IN_IDX, false);
PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[config->pin_vsync], PIN_FUNC_GPIO);
gpio_set_direction(config->pin_vsync, GPIO_MODE_INPUT);
gpio_set_pull_mode(config->pin_vsync, GPIO_FLOATING);
gpio_matrix_in(config->pin_vsync, I2S0I_V_SYNC_IDX, false);
PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[config->pin_href], PIN_FUNC_GPIO);
gpio_set_direction(config->pin_href, GPIO_MODE_INPUT);
gpio_set_pull_mode(config->pin_href, GPIO_FLOATING);
gpio_matrix_in(config->pin_href, I2S0I_H_SYNC_IDX, false);
int data_pins[8] = {
config->pin_d0, config->pin_d1, config->pin_d2, config->pin_d3, config->pin_d4, config->pin_d5, config->pin_d6, config->pin_d7,
};
for (int i = 0; i < 8; i++) {
PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[data_pins[i]], PIN_FUNC_GPIO);
gpio_set_direction(data_pins[i], GPIO_MODE_INPUT);
gpio_set_pull_mode(data_pins[i], GPIO_FLOATING);
gpio_matrix_in(data_pins[i], I2S0I_DATA_IN0_IDX + i, false);
}
gpio_matrix_in(0x38, I2S0I_H_ENABLE_IDX, false);
return ESP_OK;
}
esp_err_t ll_cam_init_isr(cam_obj_t *cam)
{
return esp_intr_alloc(ETS_I2S0_INTR_SOURCE, ESP_INTR_FLAG_LOWMED | ESP_INTR_FLAG_IRAM, ll_cam_dma_isr, cam, &cam->cam_intr_handle);
}
void ll_cam_do_vsync(cam_obj_t *cam)
{
}
uint8_t ll_cam_get_dma_align(cam_obj_t *cam)
{
return 0;
}
static bool ll_cam_calc_rgb_dma(cam_obj_t *cam){
size_t dma_half_buffer_max = CONFIG_CAMERA_DMA_BUFFER_SIZE_MAX / 2 / cam->dma_bytes_per_item;
size_t dma_buffer_max = 2 * dma_half_buffer_max;
size_t node_max = LCD_CAM_DMA_NODE_BUFFER_MAX_SIZE / cam->dma_bytes_per_item;
size_t line_width = cam->width * cam->in_bytes_per_pixel;
size_t image_size = cam->height * line_width;
if (image_size > (4 * 1024 * 1024) || (line_width > dma_half_buffer_max)) {
ESP_LOGE(TAG, "Resolution too high");
return 0;
}
size_t node_size = node_max;
size_t nodes_per_line = 1;
size_t lines_per_node = 1;
size_t lines_per_half_buffer = 1;
size_t dma_half_buffer_min = node_max;
size_t dma_half_buffer = dma_half_buffer_max;
size_t dma_buffer_size = dma_buffer_max;
// Calculate DMA Node Size so that it's divisable by or divisor of the line width
if(line_width >= node_max){
// One or more nodes will be requied for one line
for(size_t i = node_max; i > 0; i=i-1){
if ((line_width % i) == 0) {
node_size = i;
nodes_per_line = line_width / node_size;
break;
}
}
} else {
// One or more lines can fit into one node
for(size_t i = node_max; i > 0; i=i-1){
if ((i % line_width) == 0) {
node_size = i;
lines_per_node = node_size / line_width;
while((cam->height % lines_per_node) != 0){
lines_per_node = lines_per_node - 1;
node_size = lines_per_node * line_width;
}
break;
}
}
}
// Calculate minimum EOF size = max(mode_size, line_size)
dma_half_buffer_min = node_size * nodes_per_line;
// Calculate max EOF size divisable by node size
dma_half_buffer = (dma_half_buffer_max / dma_half_buffer_min) * dma_half_buffer_min;
// Adjust EOF size so that height will be divisable by the number of lines in each EOF
lines_per_half_buffer = dma_half_buffer / line_width;
while((cam->height % lines_per_half_buffer) != 0){
dma_half_buffer = dma_half_buffer - dma_half_buffer_min;
lines_per_half_buffer = dma_half_buffer / line_width;
}
// Calculate DMA size
dma_buffer_size =(dma_buffer_max / dma_half_buffer) * dma_half_buffer;
ESP_LOGI(TAG, "node_size: %4u, nodes_per_line: %u, lines_per_node: %u, dma_half_buffer_min: %5u, dma_half_buffer: %5u,"
"lines_per_half_buffer: %2u, dma_buffer_size: %5u, image_size: %u",
(unsigned) (node_size * cam->dma_bytes_per_item), (unsigned) nodes_per_line, (unsigned) lines_per_node,
(unsigned) (dma_half_buffer_min * cam->dma_bytes_per_item), (unsigned) (dma_half_buffer * cam->dma_bytes_per_item),
(unsigned) (lines_per_half_buffer), (unsigned) (dma_buffer_size * cam->dma_bytes_per_item), (unsigned) image_size);
cam->dma_buffer_size = dma_buffer_size * cam->dma_bytes_per_item;
cam->dma_half_buffer_size = dma_half_buffer * cam->dma_bytes_per_item;
cam->dma_node_buffer_size = node_size * cam->dma_bytes_per_item;
cam->dma_half_buffer_cnt = cam->dma_buffer_size / cam->dma_half_buffer_size;
return 1;
}
bool ll_cam_dma_sizes(cam_obj_t *cam)
{
cam->dma_bytes_per_item = ll_cam_bytes_per_sample(sampling_mode);
if (cam->jpeg_mode) {
cam->dma_half_buffer_cnt = 8;
cam->dma_node_buffer_size = 2048;
cam->dma_half_buffer_size = cam->dma_node_buffer_size * 2;
cam->dma_buffer_size = cam->dma_half_buffer_cnt * cam->dma_half_buffer_size;
} else {
return ll_cam_calc_rgb_dma(cam);
}
return 1;
}
static dma_filter_t dma_filter = ll_cam_dma_filter_jpeg;
size_t IRAM_ATTR ll_cam_memcpy(cam_obj_t *cam, uint8_t *out, const uint8_t *in, size_t len)
{
//DBG_PIN_SET(1);
size_t r = dma_filter(out, in, len);
//DBG_PIN_SET(0);
return r;
}
esp_err_t ll_cam_set_sample_mode(cam_obj_t *cam, pixformat_t pix_format, uint32_t xclk_freq_hz, uint16_t sensor_pid)
{
if (pix_format == PIXFORMAT_GRAYSCALE) {
if (sensor_pid == OV3660_PID || sensor_pid == OV5640_PID || sensor_pid == NT99141_PID || sensor_pid == SC031GS_PID || sensor_pid == BF20A6_PID || sensor_pid == GC0308_PID) {
if (xclk_freq_hz > 10000000) {
sampling_mode = SM_0A00_0B00;
dma_filter = ll_cam_dma_filter_yuyv_highspeed;
} else {
sampling_mode = SM_0A0B_0C0D;
dma_filter = ll_cam_dma_filter_yuyv;
}
cam->in_bytes_per_pixel = 1; // camera sends Y8
} else {
if (xclk_freq_hz > 10000000 && sensor_pid != OV7725_PID) {
sampling_mode = SM_0A00_0B00;
dma_filter = ll_cam_dma_filter_grayscale_highspeed;
} else {
sampling_mode = SM_0A0B_0C0D;
dma_filter = ll_cam_dma_filter_grayscale;
}
cam->in_bytes_per_pixel = 2; // camera sends YU/YV
}
cam->fb_bytes_per_pixel = 1; // frame buffer stores Y8
} else if (pix_format == PIXFORMAT_YUV422 || pix_format == PIXFORMAT_RGB565) {
if (xclk_freq_hz > 10000000 && sensor_pid != OV7725_PID) {
if (sensor_pid == OV7670_PID) {
sampling_mode = SM_0A0B_0B0C;
} else {
sampling_mode = SM_0A00_0B00;
}
dma_filter = ll_cam_dma_filter_yuyv_highspeed;
} else {
sampling_mode = SM_0A0B_0C0D;
dma_filter = ll_cam_dma_filter_yuyv;
}
cam->in_bytes_per_pixel = 2; // camera sends YU/YV
cam->fb_bytes_per_pixel = 2; // frame buffer stores YU/YV/RGB565
} else if (pix_format == PIXFORMAT_JPEG) {
cam->in_bytes_per_pixel = 1;
cam->fb_bytes_per_pixel = 1;
dma_filter = ll_cam_dma_filter_jpeg;
sampling_mode = SM_0A00_0B00;
} else {
ESP_LOGE(TAG, "Requested format is not supported");
return ESP_ERR_NOT_SUPPORTED;
}
I2S0.fifo_conf.rx_fifo_mod = sampling_mode;
return ESP_OK;
}

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managed_components/espressif__esp32-camera/target/esp32s2/ll_cam.c Normal file
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// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include <stdio.h>
#include <string.h>
#include "soc/system_reg.h"
#include "soc/i2s_struct.h"
#include "hal/gpio_ll.h"
#include "ll_cam.h"
#include "xclk.h"
#include "cam_hal.h"
#if (ESP_IDF_VERSION_MAJOR >= 4) && (ESP_IDF_VERSION_MINOR >= 3)
#include "esp_rom_gpio.h"
#endif
#if (ESP_IDF_VERSION_MAJOR >= 5)
#include "driver/gpio.h"
#define GPIO_PIN_INTR_POSEDGE GPIO_INTR_POSEDGE
#define GPIO_PIN_INTR_NEGEDGE GPIO_INTR_NEGEDGE
#define gpio_matrix_in(a,b,c) esp_rom_gpio_connect_in_signal(a,b,c)
#define ets_delay_us(a) esp_rom_delay_us(a)
#endif
static const char *TAG = "s2 ll_cam";
#define I2S_ISR_ENABLE(i) {I2S0.int_clr.i = 1;I2S0.int_ena.i = 1;}
#define I2S_ISR_DISABLE(i) {I2S0.int_ena.i = 0;I2S0.int_clr.i = 1;}
static void CAMERA_ISR_IRAM_ATTR ll_cam_vsync_isr(void *arg)
{
//DBG_PIN_SET(1);
cam_obj_t *cam = (cam_obj_t *)arg;
BaseType_t HPTaskAwoken = pdFALSE;
// filter
ets_delay_us(1);
if (gpio_ll_get_level(&GPIO, cam->vsync_pin) == !cam->vsync_invert) {
ll_cam_send_event(cam, CAM_VSYNC_EVENT, &HPTaskAwoken);
}
if (HPTaskAwoken == pdTRUE) {
portYIELD_FROM_ISR();
}
//DBG_PIN_SET(0);
}
static void CAMERA_ISR_IRAM_ATTR ll_cam_dma_isr(void *arg)
{
cam_obj_t *cam = (cam_obj_t *)arg;
BaseType_t HPTaskAwoken = pdFALSE;
typeof(I2S0.int_st) status = I2S0.int_st;
if (status.val == 0) {
return;
}
I2S0.int_clr.val = status.val;
if (status.in_suc_eof) {
ll_cam_send_event(cam, CAM_IN_SUC_EOF_EVENT, &HPTaskAwoken);
}
if (HPTaskAwoken == pdTRUE) {
portYIELD_FROM_ISR();
}
}
bool IRAM_ATTR ll_cam_stop(cam_obj_t *cam)
{
I2S0.conf.rx_start = 0;
if (cam->jpeg_mode || !cam->psram_mode) {
I2S_ISR_DISABLE(in_suc_eof);
}
I2S0.in_link.stop = 1;
return true;
}
esp_err_t ll_cam_deinit(cam_obj_t *cam)
{
gpio_isr_handler_remove(cam->vsync_pin);
if (cam->cam_intr_handle) {
esp_intr_free(cam->cam_intr_handle);
cam->cam_intr_handle = NULL;
}
return ESP_OK;
}
bool ll_cam_start(cam_obj_t *cam, int frame_pos)
{
I2S0.conf.rx_start = 0;
if (cam->jpeg_mode || !cam->psram_mode) {
I2S_ISR_ENABLE(in_suc_eof);
}
I2S0.conf.rx_reset = 1;
I2S0.conf.rx_reset = 0;
I2S0.conf.rx_fifo_reset = 1;
I2S0.conf.rx_fifo_reset = 0;
I2S0.lc_conf.in_rst = 1;
I2S0.lc_conf.in_rst = 0;
I2S0.lc_conf.ahbm_fifo_rst = 1;
I2S0.lc_conf.ahbm_fifo_rst = 0;
I2S0.lc_conf.ahbm_rst = 1;
I2S0.lc_conf.ahbm_rst = 0;
I2S0.rx_eof_num = cam->dma_half_buffer_size; // Ping pong operation
if (!cam->psram_mode) {
I2S0.in_link.addr = ((uint32_t)&cam->dma[0]) & 0xfffff;
} else {
I2S0.in_link.addr = ((uint32_t)&cam->frames[frame_pos].dma[0]) & 0xfffff;
}
I2S0.in_link.start = 1;
I2S0.conf.rx_start = 1;
return true;
}
esp_err_t ll_cam_config(cam_obj_t *cam, const camera_config_t *config)
{
esp_err_t err = camera_enable_out_clock(config);
if(err != ESP_OK) {
return err;
}
periph_module_enable(PERIPH_I2S0_MODULE);
// Configure the clock
I2S0.clkm_conf.clkm_div_num = 2; // 160MHz / 2 = 80MHz
I2S0.clkm_conf.clkm_div_b = 0;
I2S0.clkm_conf.clkm_div_a = 0;
I2S0.clkm_conf.clk_sel = 2;
I2S0.clkm_conf.clk_en = 1;
I2S0.conf.val = 0;
I2S0.fifo_conf.val = 0;
I2S0.fifo_conf.dscr_en = 1;
I2S0.lc_conf.ahbm_fifo_rst = 1;
I2S0.lc_conf.ahbm_fifo_rst = 0;
I2S0.lc_conf.ahbm_rst = 1;
I2S0.lc_conf.ahbm_rst = 0;
I2S0.lc_conf.check_owner = 0;
//I2S0.lc_conf.indscr_burst_en = 1;
//I2S0.lc_conf.ext_mem_bk_size = 0; // DMA access external memory block size. 0: 16 bytes, 1: 32 bytes, 2:64 bytes, 3:reserved
I2S0.timing.val = 0;
I2S0.int_ena.val = 0;
I2S0.int_clr.val = ~0;
I2S0.conf2.lcd_en = 1;
I2S0.conf2.camera_en = 1;
// Configuration data format
I2S0.conf.rx_slave_mod = 1;
I2S0.conf.rx_right_first = 0;
I2S0.conf.rx_msb_right = cam->swap_data;
I2S0.conf.rx_short_sync = 0;
I2S0.conf.rx_mono = 0;
I2S0.conf.rx_msb_shift = 0;
I2S0.conf.rx_dma_equal = 1;
// Configure sampling rate
I2S0.sample_rate_conf.rx_bck_div_num = 1;
I2S0.sample_rate_conf.rx_bits_mod = 8;
I2S0.conf2.i_v_sync_filter_en = 1;
I2S0.conf2.i_v_sync_filter_thres = 4;
I2S0.conf2.cam_sync_fifo_reset = 1;
I2S0.conf2.cam_sync_fifo_reset = 0;
I2S0.conf_chan.rx_chan_mod = 1;
I2S0.fifo_conf.rx_fifo_mod_force_en = 1;
I2S0.fifo_conf.rx_data_num = 32;
I2S0.fifo_conf.rx_fifo_mod = 2;
I2S0.lc_conf.in_rst = 1;
I2S0.lc_conf.in_rst = 0;
I2S0.conf.rx_start = 1;
return ESP_OK;
}
void ll_cam_vsync_intr_enable(cam_obj_t *cam, bool en)
{
if (en) {
gpio_intr_enable(cam->vsync_pin);
} else {
gpio_intr_disable(cam->vsync_pin);
}
}
esp_err_t ll_cam_set_pin(cam_obj_t *cam, const camera_config_t *config)
{
gpio_config_t io_conf = {0};
io_conf.intr_type = cam->vsync_invert ? GPIO_PIN_INTR_NEGEDGE : GPIO_PIN_INTR_POSEDGE;
io_conf.pin_bit_mask = 1ULL << config->pin_vsync;
io_conf.mode = GPIO_MODE_INPUT;
io_conf.pull_up_en = 1;
io_conf.pull_down_en = 0;
gpio_config(&io_conf);
gpio_install_isr_service(ESP_INTR_FLAG_LOWMED | CAMERA_ISR_IRAM_FLAG);
gpio_isr_handler_add(config->pin_vsync, ll_cam_vsync_isr, cam);
gpio_intr_disable(config->pin_vsync);
PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[config->pin_pclk], PIN_FUNC_GPIO);
gpio_set_direction(config->pin_pclk, GPIO_MODE_INPUT);
gpio_set_pull_mode(config->pin_pclk, GPIO_FLOATING);
gpio_matrix_in(config->pin_pclk, I2S0I_WS_IN_IDX, false);
PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[config->pin_vsync], PIN_FUNC_GPIO);
gpio_set_direction(config->pin_vsync, GPIO_MODE_INPUT);
gpio_set_pull_mode(config->pin_vsync, GPIO_FLOATING);
gpio_matrix_in(config->pin_vsync, I2S0I_V_SYNC_IDX, cam->vsync_invert);
PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[config->pin_href], PIN_FUNC_GPIO);
gpio_set_direction(config->pin_href, GPIO_MODE_INPUT);
gpio_set_pull_mode(config->pin_href, GPIO_FLOATING);
gpio_matrix_in(config->pin_href, I2S0I_H_SYNC_IDX, false);
int data_pins[8] = {
config->pin_d0, config->pin_d1, config->pin_d2, config->pin_d3, config->pin_d4, config->pin_d5, config->pin_d6, config->pin_d7,
};
for (int i = 0; i < 8; i++) {
PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[data_pins[i]], PIN_FUNC_GPIO);
gpio_set_direction(data_pins[i], GPIO_MODE_INPUT);
gpio_set_pull_mode(data_pins[i], GPIO_FLOATING);
// High bit alignment, IN16 is always the highest bit
// fifo accesses data by bit, when rx_bits_mod is 8, the data needs to be aligned by 8 bits
gpio_matrix_in(data_pins[i], I2S0I_DATA_IN0_IDX + 8 + i, false);
}
gpio_matrix_in(0x38, I2S0I_H_ENABLE_IDX, false);
return ESP_OK;
}
esp_err_t ll_cam_init_isr(cam_obj_t *cam)
{
return esp_intr_alloc(ETS_I2S0_INTR_SOURCE, ESP_INTR_FLAG_LOWMED | CAMERA_ISR_IRAM_FLAG, ll_cam_dma_isr, cam, &cam->cam_intr_handle);
}
void ll_cam_do_vsync(cam_obj_t *cam)
{
ll_cam_vsync_intr_enable(cam, false);
gpio_matrix_in(cam->vsync_pin, I2S0I_V_SYNC_IDX, !cam->vsync_invert);
ets_delay_us(10);
gpio_matrix_in(cam->vsync_pin, I2S0I_V_SYNC_IDX, cam->vsync_invert);
ll_cam_vsync_intr_enable(cam, true);
}
uint8_t ll_cam_get_dma_align(cam_obj_t *cam)
{
return 64;//16 << I2S0.lc_conf.ext_mem_bk_size;
}
static bool ll_cam_calc_rgb_dma(cam_obj_t *cam){
size_t node_max = LCD_CAM_DMA_NODE_BUFFER_MAX_SIZE / cam->dma_bytes_per_item;
size_t line_width = cam->width * cam->in_bytes_per_pixel;
size_t node_size = node_max;
size_t nodes_per_line = 1;
size_t lines_per_node = 1;
// Calculate DMA Node Size so that it's divisable by or divisor of the line width
if(line_width >= node_max){
// One or more nodes will be requied for one line
for(size_t i = node_max; i > 0; i=i-1){
if ((line_width % i) == 0) {
node_size = i;
nodes_per_line = line_width / node_size;
break;
}
}
} else {
// One or more lines can fit into one node
for(size_t i = node_max; i > 0; i=i-1){
if ((i % line_width) == 0) {
node_size = i;
lines_per_node = node_size / line_width;
while((cam->height % lines_per_node) != 0){
lines_per_node = lines_per_node - 1;
node_size = lines_per_node * line_width;
}
break;
}
}
}
ESP_LOGI(TAG, "node_size: %4u, nodes_per_line: %u, lines_per_node: %u",
(unsigned) (node_size * cam->dma_bytes_per_item), nodes_per_line, lines_per_node);
cam->dma_node_buffer_size = node_size * cam->dma_bytes_per_item;
if (cam->psram_mode) {
cam->dma_buffer_size = cam->recv_size * cam->dma_bytes_per_item;
cam->dma_half_buffer_cnt = 2;
cam->dma_half_buffer_size = cam->dma_buffer_size / cam->dma_half_buffer_cnt;
} else {
size_t dma_half_buffer_max = CONFIG_CAMERA_DMA_BUFFER_SIZE_MAX / 2 / cam->dma_bytes_per_item;
if (line_width > dma_half_buffer_max) {
ESP_LOGE(TAG, "Resolution too high");
return 0;
}
// Calculate minimum EOF size = max(mode_size, line_size)
size_t dma_half_buffer_min = node_size * nodes_per_line;
// Calculate max EOF size divisable by node size
size_t dma_half_buffer = (dma_half_buffer_max / dma_half_buffer_min) * dma_half_buffer_min;
// Adjust EOF size so that height will be divisable by the number of lines in each EOF
size_t lines_per_half_buffer = dma_half_buffer / line_width;
while((cam->height % lines_per_half_buffer) != 0){
dma_half_buffer = dma_half_buffer - dma_half_buffer_min;
lines_per_half_buffer = dma_half_buffer / line_width;
}
// Calculate DMA size
size_t dma_buffer_max = 2 * dma_half_buffer_max;
size_t dma_buffer_size = dma_buffer_max;
dma_buffer_size =(dma_buffer_max / dma_half_buffer) * dma_half_buffer;
ESP_LOGI(TAG, "dma_half_buffer_min: %5u, dma_half_buffer: %5u, lines_per_half_buffer: %2u, dma_buffer_size: %5u",
(unsigned) (dma_half_buffer_min * cam->dma_bytes_per_item), (unsigned) (dma_half_buffer * cam->dma_bytes_per_item),
(unsigned) lines_per_half_buffer, (unsigned) (dma_buffer_size * cam->dma_bytes_per_item));
cam->dma_buffer_size = dma_buffer_size * cam->dma_bytes_per_item;
cam->dma_half_buffer_size = dma_half_buffer * cam->dma_bytes_per_item;
cam->dma_half_buffer_cnt = cam->dma_buffer_size / cam->dma_half_buffer_size;
}
return 1;
}
bool ll_cam_dma_sizes(cam_obj_t *cam)
{
cam->dma_bytes_per_item = 1;
if (cam->jpeg_mode) {
if (cam->psram_mode) {
cam->dma_buffer_size = cam->recv_size;
cam->dma_half_buffer_size = 1024;
cam->dma_half_buffer_cnt = cam->dma_buffer_size / cam->dma_half_buffer_size;
cam->dma_node_buffer_size = cam->dma_half_buffer_size;
} else {
cam->dma_half_buffer_cnt = 16;
cam->dma_buffer_size = cam->dma_half_buffer_cnt * 1024;
cam->dma_half_buffer_size = cam->dma_buffer_size / cam->dma_half_buffer_cnt;
cam->dma_node_buffer_size = cam->dma_half_buffer_size;
}
} else {
return ll_cam_calc_rgb_dma(cam);
}
return 1;
}
size_t IRAM_ATTR ll_cam_memcpy(cam_obj_t *cam, uint8_t *out, const uint8_t *in, size_t len)
{
// YUV to Grayscale
if (cam->in_bytes_per_pixel == 2 && cam->fb_bytes_per_pixel == 1) {
size_t end = len / 8;
for (size_t i = 0; i < end; ++i) {
out[0] = in[0];
out[1] = in[2];
out[2] = in[4];
out[3] = in[6];
out += 4;
in += 8;
}
return len / 2;
}
// just memcpy
memcpy(out, in, len);
return len;
}
esp_err_t ll_cam_set_sample_mode(cam_obj_t *cam, pixformat_t pix_format, uint32_t xclk_freq_hz, uint16_t sensor_pid)
{
if (pix_format == PIXFORMAT_GRAYSCALE) {
if (sensor_pid == OV3660_PID || sensor_pid == OV5640_PID || sensor_pid == NT99141_PID || sensor_pid == SC031GS_PID || sensor_pid == BF20A6_PID || sensor_pid == GC0308_PID) {
cam->in_bytes_per_pixel = 1; // camera sends Y8
} else {
cam->in_bytes_per_pixel = 2; // camera sends YU/YV
}
cam->fb_bytes_per_pixel = 1; // frame buffer stores Y8
} else if (pix_format == PIXFORMAT_YUV422 || pix_format == PIXFORMAT_RGB565) {
cam->in_bytes_per_pixel = 2; // camera sends YU/YV
cam->fb_bytes_per_pixel = 2; // frame buffer stores YU/YV/RGB565
} else if (pix_format == PIXFORMAT_JPEG) {
cam->in_bytes_per_pixel = 1;
cam->fb_bytes_per_pixel = 1;
} else {
ESP_LOGE(TAG, "Requested format is not supported");
return ESP_ERR_NOT_SUPPORTED;
}
return ESP_OK;
}

99
managed_components/espressif__esp32-camera/target/esp32s2/private_include/tjpgd.h Normal file
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/*----------------------------------------------------------------------------/
/ TJpgDec - Tiny JPEG Decompressor include file (C)ChaN, 2012
/----------------------------------------------------------------------------*/
#ifndef _TJPGDEC
#define _TJPGDEC
/*---------------------------------------------------------------------------*/
/* System Configurations */
#define JD_SZBUF 512 /* Size of stream input buffer */
#define JD_FORMAT 0 /* Output pixel format 0:RGB888 (3 BYTE/pix), 1:RGB565 (1 WORD/pix) */
#define JD_USE_SCALE 1 /* Use descaling feature for output */
#define JD_TBLCLIP 1 /* Use table for saturation (might be a bit faster but increases 1K bytes of code size) */
/*---------------------------------------------------------------------------*/
#ifdef __cplusplus
extern "C" {
#endif
/* These types must be 16-bit, 32-bit or larger integer */
typedef int INT;
typedef unsigned int UINT;
/* These types must be 8-bit integer */
typedef char CHAR;
typedef unsigned char UCHAR;
typedef unsigned char BYTE;
/* These types must be 16-bit integer */
typedef short SHORT;
typedef unsigned short USHORT;
typedef unsigned short WORD;
typedef unsigned short WCHAR;
/* These types must be 32-bit integer */
typedef long LONG;
typedef unsigned long ULONG;
typedef unsigned long DWORD;
/* Error code */
typedef enum {
JDR_OK = 0, /* 0: Succeeded */
JDR_INTR, /* 1: Interrupted by output function */
JDR_INP, /* 2: Device error or wrong termination of input stream */
JDR_MEM1, /* 3: Insufficient memory pool for the image */
JDR_MEM2, /* 4: Insufficient stream input buffer */
JDR_PAR, /* 5: Parameter error */
JDR_FMT1, /* 6: Data format error (may be damaged data) */
JDR_FMT2, /* 7: Right format but not supported */
JDR_FMT3 /* 8: Not supported JPEG standard */
} JRESULT;
/* Rectangular structure */
typedef struct {
WORD left, right, top, bottom;
} JRECT;
/* Decompressor object structure */
typedef struct JDEC JDEC;
struct JDEC {
UINT dctr; /* Number of bytes available in the input buffer */
BYTE* dptr; /* Current data read ptr */
BYTE* inbuf; /* Bit stream input buffer */
BYTE dmsk; /* Current bit in the current read byte */
BYTE scale; /* Output scaling ratio */
BYTE msx, msy; /* MCU size in unit of block (width, height) */
BYTE qtid[3]; /* Quantization table ID of each component */
SHORT dcv[3]; /* Previous DC element of each component */
WORD nrst; /* Restart inverval */
UINT width, height; /* Size of the input image (pixel) */
BYTE* huffbits[2][2]; /* Huffman bit distribution tables [id][dcac] */
WORD* huffcode[2][2]; /* Huffman code word tables [id][dcac] */
BYTE* huffdata[2][2]; /* Huffman decoded data tables [id][dcac] */
LONG* qttbl[4]; /* Dequaitizer tables [id] */
void* workbuf; /* Working buffer for IDCT and RGB output */
BYTE* mcubuf; /* Working buffer for the MCU */
void* pool; /* Pointer to available memory pool */
UINT sz_pool; /* Size of momory pool (bytes available) */
UINT (*infunc)(JDEC*, BYTE*, UINT);/* Pointer to jpeg stream input function */
void* device; /* Pointer to I/O device identifiler for the session */
};
/* TJpgDec API functions */
JRESULT jd_prepare (JDEC*, UINT(*)(JDEC*,BYTE*,UINT), void*, UINT, void*);
JRESULT jd_decomp (JDEC*, UINT(*)(JDEC*,void*,JRECT*), BYTE);
#ifdef __cplusplus
}
#endif
#endif /* _TJPGDEC */

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managed_components/espressif__esp32-camera/target/esp32s3/ll_cam.c Normal file
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// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include <stdio.h>
#include <string.h>
#include "soc/system_reg.h"
#include "soc/lcd_cam_struct.h"
#include "soc/lcd_cam_reg.h"
#include "soc/gdma_struct.h"
#include "soc/gdma_periph.h"
#include "soc/gdma_reg.h"
#include "hal/clk_gate_ll.h"
#include "esp_private/gdma.h"
#include "ll_cam.h"
#include "cam_hal.h"
#include "esp_rom_gpio.h"
#if (ESP_IDF_VERSION_MAJOR >= 5)
#include "driver/gpio.h"
#include "soc/gpio_sig_map.h"
#include "soc/gpio_periph.h"
#include "soc/io_mux_reg.h"
#define gpio_matrix_in(a,b,c) esp_rom_gpio_connect_in_signal(a,b,c)
#define gpio_matrix_out(a,b,c,d) esp_rom_gpio_connect_out_signal(a,b,c,d)
#define ets_delay_us(a) esp_rom_delay_us(a)
#endif
#if !defined(SOC_GDMA_PAIRS_PER_GROUP) && defined(SOC_GDMA_PAIRS_PER_GROUP_MAX)
#define SOC_GDMA_PAIRS_PER_GROUP SOC_GDMA_PAIRS_PER_GROUP_MAX
#endif
static const char *TAG = "s3 ll_cam";
void ll_cam_dma_print_state(cam_obj_t *cam)
{
esp_rom_printf("dma_infifo_status[%u] :\n", cam->dma_num);
esp_rom_printf(" infifo_full_l1 : %lu\n", GDMA.channel[cam->dma_num].in.infifo_status.infifo_full_l1);
esp_rom_printf(" infifo_empty_l1 : %lu\n", GDMA.channel[cam->dma_num].in.infifo_status.infifo_empty_l1);
esp_rom_printf(" infifo_full_l2 : %lu\n", GDMA.channel[cam->dma_num].in.infifo_status.infifo_full_l2);
esp_rom_printf(" infifo_empty_l2 : %lu\n", GDMA.channel[cam->dma_num].in.infifo_status.infifo_empty_l2);
esp_rom_printf(" infifo_full_l3 : %lu\n", GDMA.channel[cam->dma_num].in.infifo_status.infifo_full_l3);
esp_rom_printf(" infifo_empty_l3 : %lu\n", GDMA.channel[cam->dma_num].in.infifo_status.infifo_empty_l3);
esp_rom_printf(" infifo_cnt_l1 : %lu\n", GDMA.channel[cam->dma_num].in.infifo_status.infifo_cnt_l1);
esp_rom_printf(" infifo_cnt_l2 : %lu\n", GDMA.channel[cam->dma_num].in.infifo_status.infifo_cnt_l2);
esp_rom_printf(" infifo_cnt_l3 : %lu\n", GDMA.channel[cam->dma_num].in.infifo_status.infifo_cnt_l3);
esp_rom_printf(" in_remain_under_1b_l3: %lu\n", GDMA.channel[cam->dma_num].in.infifo_status.in_remain_under_1b_l3);
esp_rom_printf(" in_remain_under_2b_l3: %lu\n", GDMA.channel[cam->dma_num].in.infifo_status.in_remain_under_2b_l3);
esp_rom_printf(" in_remain_under_3b_l3: %lu\n", GDMA.channel[cam->dma_num].in.infifo_status.in_remain_under_3b_l3);
esp_rom_printf(" in_remain_under_4b_l3: %lu\n", GDMA.channel[cam->dma_num].in.infifo_status.in_remain_under_4b_l3);
esp_rom_printf(" in_buf_hungry : %lu\n", GDMA.channel[cam->dma_num].in.infifo_status.in_buf_hungry);
esp_rom_printf("dma_state[%u] :\n", cam->dma_num);
esp_rom_printf(" dscr_addr : 0x%lx\n", GDMA.channel[cam->dma_num].in.state.dscr_addr);
esp_rom_printf(" in_dscr_state : %lu\n", GDMA.channel[cam->dma_num].in.state.in_dscr_state);
esp_rom_printf(" in_state : %lu\n", GDMA.channel[cam->dma_num].in.state.in_state);
}
void ll_cam_dma_reset(cam_obj_t *cam)
{
GDMA.channel[cam->dma_num].in.int_clr.val = ~0;
GDMA.channel[cam->dma_num].in.int_ena.val = 0;
GDMA.channel[cam->dma_num].in.conf0.val = 0;
GDMA.channel[cam->dma_num].in.conf0.in_rst = 1;
GDMA.channel[cam->dma_num].in.conf0.in_rst = 0;
//internal SRAM only
if (!cam->psram_mode) {
GDMA.channel[cam->dma_num].in.conf0.indscr_burst_en = 1;
GDMA.channel[cam->dma_num].in.conf0.in_data_burst_en = 1;
}
GDMA.channel[cam->dma_num].in.conf1.in_check_owner = 0;
// GDMA.channel[cam->dma_num].in.conf1.in_ext_mem_bk_size = 2;
GDMA.channel[cam->dma_num].in.peri_sel.sel = 5;
//GDMA.channel[cam->dma_num].in.pri.rx_pri = 1;//rx prio 0-15
//GDMA.channel[cam->dma_num].in.sram_size.in_size = 6;//This register is used to configure the size of L2 Tx FIFO for Rx channel. 0:16 bytes, 1:24 bytes, 2:32 bytes, 3: 40 bytes, 4: 48 bytes, 5:56 bytes, 6: 64 bytes, 7: 72 bytes, 8: 80 bytes.
//GDMA.channel[cam->dma_num].in.wight.rx_weight = 7;//The weight of Rx channel 0-15
}
static void CAMERA_ISR_IRAM_ATTR ll_cam_vsync_isr(void *arg)
{
//DBG_PIN_SET(1);
cam_obj_t *cam = (cam_obj_t *)arg;
BaseType_t HPTaskAwoken = pdFALSE;
typeof(LCD_CAM.lc_dma_int_st) status = LCD_CAM.lc_dma_int_st;
if (status.val == 0) {
return;
}
LCD_CAM.lc_dma_int_clr.val = status.val;
if (status.cam_vsync_int_st) {
ll_cam_send_event(cam, CAM_VSYNC_EVENT, &HPTaskAwoken);
}
if (HPTaskAwoken == pdTRUE) {
portYIELD_FROM_ISR();
}
//DBG_PIN_SET(0);
}
static void CAMERA_ISR_IRAM_ATTR ll_cam_dma_isr(void *arg)
{
cam_obj_t *cam = (cam_obj_t *)arg;
BaseType_t HPTaskAwoken = pdFALSE;
typeof(GDMA.channel[cam->dma_num].in.int_st) status = GDMA.channel[cam->dma_num].in.int_st;
if (status.val == 0) {
return;
}
GDMA.channel[cam->dma_num].in.int_clr.val = status.val;
if (status.in_suc_eof) {
ll_cam_send_event(cam, CAM_IN_SUC_EOF_EVENT, &HPTaskAwoken);
}
if (HPTaskAwoken == pdTRUE) {
portYIELD_FROM_ISR();
}
}
bool IRAM_ATTR ll_cam_stop(cam_obj_t *cam)
{
if (cam->jpeg_mode || !cam->psram_mode) {
GDMA.channel[cam->dma_num].in.int_ena.in_suc_eof = 0;
GDMA.channel[cam->dma_num].in.int_clr.in_suc_eof = 1;
}
GDMA.channel[cam->dma_num].in.link.stop = 1;
return true;
}
bool ll_cam_start(cam_obj_t *cam, int frame_pos)
{
LCD_CAM.cam_ctrl1.cam_start = 0;
if (cam->jpeg_mode || !cam->psram_mode) {
GDMA.channel[cam->dma_num].in.int_clr.in_suc_eof = 1;
GDMA.channel[cam->dma_num].in.int_ena.in_suc_eof = 1;
}
LCD_CAM.cam_ctrl1.cam_reset = 1;
LCD_CAM.cam_ctrl1.cam_reset = 0;
LCD_CAM.cam_ctrl1.cam_afifo_reset = 1;
LCD_CAM.cam_ctrl1.cam_afifo_reset = 0;
GDMA.channel[cam->dma_num].in.conf0.in_rst = 1;
GDMA.channel[cam->dma_num].in.conf0.in_rst = 0;
LCD_CAM.cam_ctrl1.cam_rec_data_bytelen = cam->dma_half_buffer_size - 1; // Ping pong operation
if (!cam->psram_mode) {
GDMA.channel[cam->dma_num].in.link.addr = ((uint32_t)&cam->dma[0]) & 0xfffff;
} else {
GDMA.channel[cam->dma_num].in.link.addr = ((uint32_t)&cam->frames[frame_pos].dma[0]) & 0xfffff;
}
GDMA.channel[cam->dma_num].in.link.start = 1;
LCD_CAM.cam_ctrl.cam_update = 1;
LCD_CAM.cam_ctrl1.cam_start = 1;
return true;
}
esp_err_t ll_cam_deinit(cam_obj_t *cam)
{
if (cam->cam_intr_handle) {
esp_intr_free(cam->cam_intr_handle);
cam->cam_intr_handle = NULL;
}
if (cam->dma_intr_handle) {
esp_intr_free(cam->dma_intr_handle);
cam->dma_intr_handle = NULL;
}
gdma_disconnect(cam->dma_channel_handle);
gdma_del_channel(cam->dma_channel_handle);
cam->dma_channel_handle = NULL;
// GDMA.channel[cam->dma_num].in.link.addr = 0x0;
LCD_CAM.cam_ctrl1.cam_start = 0;
LCD_CAM.cam_ctrl1.cam_reset = 1;
LCD_CAM.cam_ctrl1.cam_reset = 0;
return ESP_OK;
}
static esp_err_t ll_cam_dma_init(cam_obj_t *cam)
{
//alloc rx gdma channel
gdma_channel_alloc_config_t rx_alloc_config = {
.direction = GDMA_CHANNEL_DIRECTION_RX,
};
#if ((ESP_IDF_VERSION_MAJOR == 5 && ESP_IDF_VERSION_MINOR >= 4) || ESP_IDF_VERSION_MAJOR > 5)
esp_err_t ret = gdma_new_ahb_channel(&rx_alloc_config, &cam->dma_channel_handle);
#else
esp_err_t ret = gdma_new_channel(&rx_alloc_config, &cam->dma_channel_handle);
#endif
if (ret != ESP_OK) {
cam_deinit();
ESP_LOGE(TAG, "Can't find available GDMA channel");
return ESP_FAIL;
}
int chan_id = -1;
ret = gdma_get_channel_id(cam->dma_channel_handle, &chan_id);
if (ret != ESP_OK) {
cam_deinit();
ESP_LOGE(TAG, "Can't get GDMA channel number");
return ESP_FAIL;
}
cam->dma_num = chan_id;
ESP_LOGI(TAG, "DMA Channel=%d", cam->dma_num);
// for (int x = (SOC_GDMA_PAIRS_PER_GROUP - 1); x >= 0; x--) {
// if (GDMA.channel[x].in.link.addr == 0x0) {
// cam->dma_num = x;
// ESP_LOGI(TAG, "DMA Channel=%d", cam->dma_num);
// break;
// }
// if (x == 0) {
// cam_deinit();
// ESP_LOGE(TAG, "Can't found available GDMA channel");
// return ESP_FAIL;
// }
// }
if (!periph_ll_periph_enabled(PERIPH_GDMA_MODULE)) {
periph_ll_disable_clk_set_rst(PERIPH_GDMA_MODULE);
periph_ll_enable_clk_clear_rst(PERIPH_GDMA_MODULE);
}
// if (REG_GET_BIT(SYSTEM_PERIP_CLK_EN1_REG, SYSTEM_DMA_CLK_EN) == 0) {
// REG_CLR_BIT(SYSTEM_PERIP_CLK_EN1_REG, SYSTEM_DMA_CLK_EN);
// REG_SET_BIT(SYSTEM_PERIP_CLK_EN1_REG, SYSTEM_DMA_CLK_EN);
// REG_SET_BIT(SYSTEM_PERIP_RST_EN1_REG, SYSTEM_DMA_RST);
// REG_CLR_BIT(SYSTEM_PERIP_RST_EN1_REG, SYSTEM_DMA_RST);
// }
ll_cam_dma_reset(cam);
return ESP_OK;
}
#if CONFIG_CAMERA_CONVERTER_ENABLED
static esp_err_t ll_cam_converter_config(cam_obj_t *cam, const camera_config_t *config)
{
esp_err_t ret = ESP_OK;
switch (config->conv_mode) {
case YUV422_TO_YUV420:
if (config->pixel_format != PIXFORMAT_YUV422) {
ret = ESP_FAIL;
} else {
ESP_LOGI(TAG, "YUV422 to YUV420 mode");
LCD_CAM.cam_rgb_yuv.cam_conv_yuv2yuv_mode = 1;
LCD_CAM.cam_rgb_yuv.cam_conv_yuv_mode = 0;
LCD_CAM.cam_rgb_yuv.cam_conv_trans_mode = 1;
}
break;
case YUV422_TO_RGB565:
if (config->pixel_format != PIXFORMAT_YUV422) {
ret = ESP_FAIL;
} else {
ESP_LOGI(TAG, "YUV422 to RGB565 mode");
LCD_CAM.cam_rgb_yuv.cam_conv_yuv2yuv_mode = 3;
LCD_CAM.cam_rgb_yuv.cam_conv_yuv_mode = 0;
LCD_CAM.cam_rgb_yuv.cam_conv_trans_mode = 0;
}
break;
default:
break;
}
#if CONFIG_LCD_CAM_CONV_BT709_ENABLED
LCD_CAM.cam_rgb_yuv.cam_conv_protocol_mode = 1;
#else
LCD_CAM.cam_rgb_yuv.cam_conv_protocol_mode = 0;
#endif
#if CONFIG_LCD_CAM_CONV_FULL_RANGE_ENABLED
LCD_CAM.cam_rgb_yuv.cam_conv_data_out_mode = 1;
LCD_CAM.cam_rgb_yuv.cam_conv_data_in_mode = 1;
#else
LCD_CAM.cam_rgb_yuv.cam_conv_data_out_mode = 0;
LCD_CAM.cam_rgb_yuv.cam_conv_data_in_mode = 0;
#endif
LCD_CAM.cam_rgb_yuv.cam_conv_mode_8bits_on = 1;
LCD_CAM.cam_rgb_yuv.cam_conv_bypass = 1;
cam->conv_mode = config->conv_mode;
return ret;
}
#endif
esp_err_t ll_cam_config(cam_obj_t *cam, const camera_config_t *config)
{
esp_err_t ret = ESP_OK;
if (!periph_ll_periph_enabled(PERIPH_LCD_CAM_MODULE)) {
periph_ll_disable_clk_set_rst(PERIPH_LCD_CAM_MODULE);
periph_ll_enable_clk_clear_rst(PERIPH_LCD_CAM_MODULE);
}
// if (REG_GET_BIT(SYSTEM_PERIP_CLK_EN1_REG, SYSTEM_LCD_CAM_CLK_EN) == 0) {
// REG_CLR_BIT(SYSTEM_PERIP_CLK_EN1_REG, SYSTEM_LCD_CAM_CLK_EN);
// REG_SET_BIT(SYSTEM_PERIP_CLK_EN1_REG, SYSTEM_LCD_CAM_CLK_EN);
// REG_SET_BIT(SYSTEM_PERIP_RST_EN1_REG, SYSTEM_LCD_CAM_RST);
// REG_CLR_BIT(SYSTEM_PERIP_RST_EN1_REG, SYSTEM_LCD_CAM_RST);
// }
LCD_CAM.cam_ctrl.val = 0;
LCD_CAM.cam_ctrl.cam_clkm_div_b = 0;
LCD_CAM.cam_ctrl.cam_clkm_div_a = 0;
LCD_CAM.cam_ctrl.cam_clkm_div_num = 160000000 / config->xclk_freq_hz;
LCD_CAM.cam_ctrl.cam_clk_sel = 3;//Select Camera module source clock. 0: no clock. 1: APLL. 2: CLK160. 3: no clock.
LCD_CAM.cam_ctrl.cam_stop_en = 0;
LCD_CAM.cam_ctrl.cam_vsync_filter_thres = 4; // Filter by LCD_CAM clock
LCD_CAM.cam_ctrl.cam_update = 0;
LCD_CAM.cam_ctrl.cam_byte_order = cam->swap_data;
LCD_CAM.cam_ctrl.cam_bit_order = 0;
LCD_CAM.cam_ctrl.cam_line_int_en = 0;
LCD_CAM.cam_ctrl.cam_vs_eof_en = 0; //1: CAM_VSYNC to generate in_suc_eof. 0: in_suc_eof is controlled by reg_cam_rec_data_cyclelen
LCD_CAM.cam_ctrl1.val = 0;
LCD_CAM.cam_ctrl1.cam_rec_data_bytelen = LCD_CAM_DMA_NODE_BUFFER_MAX_SIZE - 1; // Cannot be assigned to 0, and it is easy to overflow
LCD_CAM.cam_ctrl1.cam_line_int_num = 0; // The number of hsyncs that generate hs interrupts
LCD_CAM.cam_ctrl1.cam_clk_inv = 0;
LCD_CAM.cam_ctrl1.cam_vsync_filter_en = 1;
LCD_CAM.cam_ctrl1.cam_2byte_en = 0;
LCD_CAM.cam_ctrl1.cam_de_inv = 0;
LCD_CAM.cam_ctrl1.cam_hsync_inv = 0;
LCD_CAM.cam_ctrl1.cam_vsync_inv = 0;
LCD_CAM.cam_ctrl1.cam_vh_de_mode_en = 0;
LCD_CAM.cam_rgb_yuv.val = 0;
#if CONFIG_CAMERA_CONVERTER_ENABLED
if (config->conv_mode) {
ret = ll_cam_converter_config(cam, config);
if(ret != ESP_OK) {
return ret;
}
}
#endif
LCD_CAM.cam_ctrl.cam_update = 1;
LCD_CAM.cam_ctrl1.cam_start = 1;
ret = ll_cam_dma_init(cam);
return ret;
}
void ll_cam_vsync_intr_enable(cam_obj_t *cam, bool en)
{
LCD_CAM.lc_dma_int_clr.cam_vsync_int_clr = 1;
if (en) {
LCD_CAM.lc_dma_int_ena.cam_vsync_int_ena = 1;
} else {
LCD_CAM.lc_dma_int_ena.cam_vsync_int_ena = 0;
}
}
esp_err_t ll_cam_set_pin(cam_obj_t *cam, const camera_config_t *config)
{
PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[config->pin_pclk], PIN_FUNC_GPIO);
gpio_set_direction(config->pin_pclk, GPIO_MODE_INPUT);
gpio_set_pull_mode(config->pin_pclk, GPIO_FLOATING);
gpio_matrix_in(config->pin_pclk, CAM_PCLK_IDX, false);
PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[config->pin_vsync], PIN_FUNC_GPIO);
gpio_set_direction(config->pin_vsync, GPIO_MODE_INPUT);
gpio_set_pull_mode(config->pin_vsync, GPIO_FLOATING);
gpio_matrix_in(config->pin_vsync, CAM_V_SYNC_IDX, cam->vsync_invert);
PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[config->pin_href], PIN_FUNC_GPIO);
gpio_set_direction(config->pin_href, GPIO_MODE_INPUT);
gpio_set_pull_mode(config->pin_href, GPIO_FLOATING);
gpio_matrix_in(config->pin_href, CAM_H_ENABLE_IDX, false);
int data_pins[8] = {
config->pin_d0, config->pin_d1, config->pin_d2, config->pin_d3, config->pin_d4, config->pin_d5, config->pin_d6, config->pin_d7,
};
for (int i = 0; i < 8; i++) {
PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[data_pins[i]], PIN_FUNC_GPIO);
gpio_set_direction(data_pins[i], GPIO_MODE_INPUT);
gpio_set_pull_mode(data_pins[i], GPIO_FLOATING);
gpio_matrix_in(data_pins[i], CAM_DATA_IN0_IDX + i, false);
}
if (config->pin_xclk >= 0) {
PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[config->pin_xclk], PIN_FUNC_GPIO);
gpio_set_direction(config->pin_xclk, GPIO_MODE_OUTPUT);
gpio_set_pull_mode(config->pin_xclk, GPIO_FLOATING);
gpio_matrix_out(config->pin_xclk, CAM_CLK_IDX, false, false);
}
return ESP_OK;
}
esp_err_t ll_cam_init_isr(cam_obj_t *cam)
{
esp_err_t ret = ESP_OK;
ret = esp_intr_alloc_intrstatus(gdma_periph_signals.groups[0].pairs[cam->dma_num].rx_irq_id,
ESP_INTR_FLAG_LOWMED | ESP_INTR_FLAG_SHARED | CAMERA_ISR_IRAM_FLAG,
(uint32_t)&GDMA.channel[cam->dma_num].in.int_st, GDMA_IN_SUC_EOF_CH0_INT_ST_M,
ll_cam_dma_isr, cam, &cam->dma_intr_handle);
if (ret != ESP_OK) {
ESP_LOGE(TAG, "DMA interrupt allocation of camera failed");
return ret;
}
ret = esp_intr_alloc_intrstatus(ETS_LCD_CAM_INTR_SOURCE,
ESP_INTR_FLAG_LOWMED | ESP_INTR_FLAG_SHARED | CAMERA_ISR_IRAM_FLAG,
(uint32_t)&LCD_CAM.lc_dma_int_st.val, LCD_CAM_CAM_VSYNC_INT_ST_M,
ll_cam_vsync_isr, cam, &cam->cam_intr_handle);
if (ret != ESP_OK) {
ESP_LOGE(TAG, "LCD_CAM interrupt allocation of camera failed");
return ret;
}
return ESP_OK;
}
void ll_cam_do_vsync(cam_obj_t *cam)
{
gpio_matrix_in(cam->vsync_pin, CAM_V_SYNC_IDX, !cam->vsync_invert);
ets_delay_us(10);
gpio_matrix_in(cam->vsync_pin, CAM_V_SYNC_IDX, cam->vsync_invert);
}
uint8_t ll_cam_get_dma_align(cam_obj_t *cam)
{
return 16 << GDMA.channel[cam->dma_num].in.conf1.in_ext_mem_bk_size;
}
static bool ll_cam_calc_rgb_dma(cam_obj_t *cam){
size_t node_max = LCD_CAM_DMA_NODE_BUFFER_MAX_SIZE / cam->dma_bytes_per_item;
size_t line_width = cam->width * cam->in_bytes_per_pixel;
size_t node_size = node_max;
size_t nodes_per_line = 1;
size_t lines_per_node = 1;
// Calculate DMA Node Size so that it's divisable by or divisor of the line width
if(line_width >= node_max){
// One or more nodes will be requied for one line
for(size_t i = node_max; i > 0; i=i-1){
if ((line_width % i) == 0) {
node_size = i;
nodes_per_line = line_width / node_size;
break;
}
}
} else {
// One or more lines can fit into one node
for(size_t i = node_max; i > 0; i=i-1){
if ((i % line_width) == 0) {
node_size = i;
lines_per_node = node_size / line_width;
while((cam->height % lines_per_node) != 0){
lines_per_node = lines_per_node - 1;
node_size = lines_per_node * line_width;
}
break;
}
}
}
ESP_LOGI(TAG, "node_size: %4u, nodes_per_line: %u, lines_per_node: %u",
(unsigned) (node_size * cam->dma_bytes_per_item), (unsigned) nodes_per_line, (unsigned) lines_per_node);
cam->dma_node_buffer_size = node_size * cam->dma_bytes_per_item;
size_t dma_half_buffer_max = CONFIG_CAMERA_DMA_BUFFER_SIZE_MAX / 2 / cam->dma_bytes_per_item;
if (line_width > dma_half_buffer_max) {
ESP_LOGE(TAG, "Resolution too high");
return 0;
}
// Calculate minimum EOF size = max(mode_size, line_size)
size_t dma_half_buffer_min = node_size * nodes_per_line;
// Calculate max EOF size divisable by node size
size_t dma_half_buffer = (dma_half_buffer_max / dma_half_buffer_min) * dma_half_buffer_min;
// Adjust EOF size so that height will be divisable by the number of lines in each EOF
size_t lines_per_half_buffer = dma_half_buffer / line_width;
while((cam->height % lines_per_half_buffer) != 0){
dma_half_buffer = dma_half_buffer - dma_half_buffer_min;
lines_per_half_buffer = dma_half_buffer / line_width;
}
// Calculate DMA size
size_t dma_buffer_max = 2 * dma_half_buffer_max;
if (cam->psram_mode) {
dma_buffer_max = cam->recv_size / cam->dma_bytes_per_item;
}
size_t dma_buffer_size = dma_buffer_max;
if (!cam->psram_mode) {
dma_buffer_size =(dma_buffer_max / dma_half_buffer) * dma_half_buffer;
}
ESP_LOGI(TAG, "dma_half_buffer_min: %5u, dma_half_buffer: %5u, lines_per_half_buffer: %2u, dma_buffer_size: %5u",
(unsigned) (dma_half_buffer_min * cam->dma_bytes_per_item), (unsigned) (dma_half_buffer * cam->dma_bytes_per_item),
(unsigned) lines_per_half_buffer, (unsigned) (dma_buffer_size * cam->dma_bytes_per_item));
cam->dma_buffer_size = dma_buffer_size * cam->dma_bytes_per_item;
cam->dma_half_buffer_size = dma_half_buffer * cam->dma_bytes_per_item;
cam->dma_half_buffer_cnt = cam->dma_buffer_size / cam->dma_half_buffer_size;
return 1;
}
bool ll_cam_dma_sizes(cam_obj_t *cam)
{
cam->dma_bytes_per_item = 1;
if (cam->jpeg_mode) {
if (cam->psram_mode) {
cam->dma_buffer_size = cam->recv_size;
cam->dma_half_buffer_size = 1024;
cam->dma_half_buffer_cnt = cam->dma_buffer_size / cam->dma_half_buffer_size;
cam->dma_node_buffer_size = cam->dma_half_buffer_size;
} else {
cam->dma_half_buffer_cnt = 16;
cam->dma_buffer_size = cam->dma_half_buffer_cnt * 1024;
cam->dma_half_buffer_size = cam->dma_buffer_size / cam->dma_half_buffer_cnt;
cam->dma_node_buffer_size = cam->dma_half_buffer_size;
}
} else {
return ll_cam_calc_rgb_dma(cam);
}
return 1;
}
size_t IRAM_ATTR ll_cam_memcpy(cam_obj_t *cam, uint8_t *out, const uint8_t *in, size_t len)
{
// YUV to Grayscale
if (cam->in_bytes_per_pixel == 2 && cam->fb_bytes_per_pixel == 1) {
size_t end = len / 8;
for (size_t i = 0; i < end; ++i) {
out[0] = in[0];
out[1] = in[2];
out[2] = in[4];
out[3] = in[6];
out += 4;
in += 8;
}
return len / 2;
}
// just memcpy
memcpy(out, in, len);
return len;
}
esp_err_t ll_cam_set_sample_mode(cam_obj_t *cam, pixformat_t pix_format, uint32_t xclk_freq_hz, uint16_t sensor_pid)
{
if (pix_format == PIXFORMAT_GRAYSCALE) {
if (sensor_pid == OV3660_PID || sensor_pid == OV5640_PID || sensor_pid == NT99141_PID || sensor_pid == SC031GS_PID || sensor_pid == BF20A6_PID || sensor_pid == GC0308_PID || sensor_pid == HM0360_PID) {
cam->in_bytes_per_pixel = 1; // camera sends Y8
} else {
cam->in_bytes_per_pixel = 2; // camera sends YU/YV
}
cam->fb_bytes_per_pixel = 1; // frame buffer stores Y8
} else if (pix_format == PIXFORMAT_YUV422 || pix_format == PIXFORMAT_RGB565) {
#if CONFIG_CAMERA_CONVERTER_ENABLED
switch (cam->conv_mode) {
case YUV422_TO_YUV420:
cam->in_bytes_per_pixel = 1.5; // for DMA receive
cam->fb_bytes_per_pixel = 1.5; // frame buffer stores YUV420
break;
case YUV422_TO_RGB565:
default:
cam->in_bytes_per_pixel = 2; // for DMA receive
cam->fb_bytes_per_pixel = 2; // frame buffer stores YU/YV/RGB565
break;
}
#else
cam->in_bytes_per_pixel = 2; // for DMA receive
cam->fb_bytes_per_pixel = 2; // frame buffer stores YU/YV/RGB565
#endif
} else if (pix_format == PIXFORMAT_JPEG) {
cam->in_bytes_per_pixel = 1;
cam->fb_bytes_per_pixel = 1;
} else {
ESP_LOGE(TAG, "Requested format is not supported");
return ESP_ERR_NOT_SUPPORTED;
}
return ESP_OK;
}
// implements function from xclk.c to allow dynamic XCLK change
esp_err_t xclk_timer_conf(int ledc_timer, int xclk_freq_hz)
{
LCD_CAM.cam_ctrl.cam_clkm_div_b = 0;
LCD_CAM.cam_ctrl.cam_clkm_div_a = 0;
LCD_CAM.cam_ctrl.cam_clkm_div_num = 160000000 / xclk_freq_hz;
LCD_CAM.cam_ctrl.cam_clk_sel = 3;//Select Camera module source clock. 0: no clock. 1: APLL. 2: CLK160. 3: no clock.
LCD_CAM.cam_ctrl.cam_update = 1;
return ESP_OK;
}

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managed_components/espressif__esp32-camera/target/private_include/ll_cam.h Normal file
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// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include <stdint.h>
#include "sdkconfig.h"
#include "esp_idf_version.h"
#if CONFIG_IDF_TARGET_ESP32
#if ESP_IDF_VERSION_MAJOR >= 4
#include "esp32/rom/lldesc.h"
#else
#include "rom/lldesc.h"
#endif
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/lldesc.h"
#elif CONFIG_IDF_TARGET_ESP32S3
#include "esp32s3/rom/lldesc.h"
#endif
#include "esp_log.h"
#include "esp_camera.h"
#include "freertos/FreeRTOS.h"
#include "freertos/queue.h"
#include "freertos/task.h"
#include "freertos/semphr.h"
#if __has_include("esp_private/periph_ctrl.h")
# include "esp_private/periph_ctrl.h"
#endif
#if __has_include("esp_private/gdma.h")
# include "esp_private/gdma.h"
#endif
#if CONFIG_LCD_CAM_ISR_IRAM_SAFE
#define CAMERA_ISR_IRAM_FLAG ESP_INTR_FLAG_IRAM
#define CAMERA_ISR_IRAM_ATTR IRAM_ATTR
#else
#define CAMERA_ISR_IRAM_FLAG 0
#define CAMERA_ISR_IRAM_ATTR
#endif
#define CAMERA_DBG_PIN_ENABLE 0
#if CAMERA_DBG_PIN_ENABLE
#if CONFIG_IDF_TARGET_ESP32
#define DBG_PIN_NUM 26
#else
#define DBG_PIN_NUM 7
#endif
#include "hal/gpio_ll.h"
#define DBG_PIN_SET(v) gpio_ll_set_level(&GPIO, DBG_PIN_NUM, v)
#else
#define DBG_PIN_SET(v)
#endif
#define CAM_CHECK(a, str, ret) if (!(a)) { \
ESP_LOGE(TAG,"%s(%d): %s", __FUNCTION__, __LINE__, str); \
return (ret); \
}
#define CAM_CHECK_GOTO(a, str, lab) if (!(a)) { \
ESP_LOGE(TAG,"%s(%d): %s", __FUNCTION__, __LINE__, str); \
goto lab; \
}
#define LCD_CAM_DMA_NODE_BUFFER_MAX_SIZE (4092)
typedef enum {
CAM_IN_SUC_EOF_EVENT = 0,
CAM_VSYNC_EVENT
} cam_event_t;
typedef enum {
CAM_STATE_IDLE = 0,
CAM_STATE_READ_BUF = 1,
} cam_state_t;
typedef struct {
camera_fb_t fb;
uint8_t en;
//for RGB/YUV modes
lldesc_t *dma;
size_t fb_offset;
} cam_frame_t;
typedef struct {
uint32_t dma_bytes_per_item;
uint32_t dma_buffer_size;
uint32_t dma_half_buffer_size;
uint32_t dma_half_buffer_cnt;
uint32_t dma_node_buffer_size;
uint32_t dma_node_cnt;
uint32_t frame_copy_cnt;
//for JPEG mode
lldesc_t *dma;
uint8_t *dma_buffer;
cam_frame_t *frames;
QueueHandle_t event_queue;
QueueHandle_t frame_buffer_queue;
TaskHandle_t task_handle;
intr_handle_t cam_intr_handle;
uint8_t dma_num;//ESP32-S3
intr_handle_t dma_intr_handle;//ESP32-S3
#if SOC_GDMA_SUPPORTED
gdma_channel_handle_t dma_channel_handle;//ESP32-S3
#endif
uint8_t jpeg_mode;
uint8_t vsync_pin;
uint8_t vsync_invert;
uint32_t frame_cnt;
uint32_t recv_size;
bool swap_data;
bool psram_mode;
//for RGB/YUV modes
uint16_t width;
uint16_t height;
#if CONFIG_CAMERA_CONVERTER_ENABLED
float in_bytes_per_pixel;
float fb_bytes_per_pixel;
camera_conv_mode_t conv_mode;
#else
uint8_t in_bytes_per_pixel;
uint8_t fb_bytes_per_pixel;
#endif
uint32_t fb_size;
cam_state_t state;
} cam_obj_t;
bool ll_cam_stop(cam_obj_t *cam);
bool ll_cam_start(cam_obj_t *cam, int frame_pos);
esp_err_t ll_cam_config(cam_obj_t *cam, const camera_config_t *config);
esp_err_t ll_cam_deinit(cam_obj_t *cam);
void ll_cam_vsync_intr_enable(cam_obj_t *cam, bool en);
esp_err_t ll_cam_set_pin(cam_obj_t *cam, const camera_config_t *config);
esp_err_t ll_cam_init_isr(cam_obj_t *cam);
void ll_cam_do_vsync(cam_obj_t *cam);
uint8_t ll_cam_get_dma_align(cam_obj_t *cam);
bool ll_cam_dma_sizes(cam_obj_t *cam);
size_t ll_cam_memcpy(cam_obj_t *cam, uint8_t *out, const uint8_t *in, size_t len);
esp_err_t ll_cam_set_sample_mode(cam_obj_t *cam, pixformat_t pix_format, uint32_t xclk_freq_hz, uint16_t sensor_pid);
#if CONFIG_IDF_TARGET_ESP32S3
void ll_cam_dma_print_state(cam_obj_t *cam);
void ll_cam_dma_reset(cam_obj_t *cam);
#endif
// implemented in cam_hal
void ll_cam_send_event(cam_obj_t *cam, cam_event_t cam_event, BaseType_t * HPTaskAwoken);

75
managed_components/espressif__esp32-camera/target/xclk.c Normal file
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#include "driver/gpio.h"
#include "driver/ledc.h"
#include "esp_err.h"
#include "esp_log.h"
#include "esp_system.h"
#include "xclk.h"
#include "esp_camera.h"
#if defined(ARDUINO_ARCH_ESP32) && defined(CONFIG_ARDUHAL_ESP_LOG)
#include "esp32-hal-log.h"
#else
#include "esp_log.h"
static const char* TAG = "camera_xclk";
#endif
#define NO_CAMERA_LEDC_CHANNEL 0xFF
static ledc_channel_t g_ledc_channel = NO_CAMERA_LEDC_CHANNEL;
esp_err_t xclk_timer_conf(int ledc_timer, int xclk_freq_hz)
{
ledc_timer_config_t timer_conf;
timer_conf.duty_resolution = LEDC_TIMER_1_BIT;
timer_conf.freq_hz = xclk_freq_hz;
timer_conf.speed_mode = LEDC_LOW_SPEED_MODE;
#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 2, 0)
timer_conf.deconfigure = false;
#endif
#if ESP_IDF_VERSION_MAJOR >= 4
timer_conf.clk_cfg = LEDC_AUTO_CLK;
#endif
timer_conf.timer_num = (ledc_timer_t)ledc_timer;
esp_err_t err = ledc_timer_config(&timer_conf);
if (err != ESP_OK) {
ESP_LOGE(TAG, "ledc_timer_config failed for freq %d, rc=%x", xclk_freq_hz, err);
}
return err;
}
esp_err_t camera_enable_out_clock(const camera_config_t* config)
{
esp_err_t err = xclk_timer_conf(config->ledc_timer, config->xclk_freq_hz);
if (err != ESP_OK) {
ESP_LOGE(TAG, "ledc_timer_config failed, rc=%x", err);
return err;
}
g_ledc_channel = config->ledc_channel;
ledc_channel_config_t ch_conf = {0};
ch_conf.gpio_num = config->pin_xclk;
ch_conf.speed_mode = LEDC_LOW_SPEED_MODE;
ch_conf.channel = config->ledc_channel;
#if ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(6,0,0)
// no need to explicitly configure interrupt, handled in the driver (IDF v6.0 and above)
ch_conf.intr_type = LEDC_INTR_DISABLE;
#endif
ch_conf.timer_sel = config->ledc_timer;
ch_conf.duty = 1;
ch_conf.hpoint = 0;
err = ledc_channel_config(&ch_conf);
if (err != ESP_OK) {
ESP_LOGE(TAG, "ledc_channel_config failed, rc=%x", err);
return err;
}
return ESP_OK;
}
void camera_disable_out_clock()
{
if (g_ledc_channel != NO_CAMERA_LEDC_CHANNEL) {
ledc_stop(LEDC_LOW_SPEED_MODE, g_ledc_channel, 0);
g_ledc_channel = NO_CAMERA_LEDC_CHANNEL;
}
}